mips: dts: Add PCIe to EcoNet EN751221

Add PCIe based on EN7528 PCIe driver, also add two MT76 wifi devices
to SmartFiber XP8421-B.

Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/boot/dts/econet/en751221.dtsi b/arch/mips/boot/dts/econet/en751221.dtsi
index 2abeef5b744a88c67638b777fdf2f0f27842313f..72cb65654c3419438afd4768e34864a73b278741 100644 (file)
--- a/arch/mips/boot/dts/econet/en751221.dtsi
+++ b/arch/mips/boot/dts/econet/en751221.dtsi
@@ -1,6 +1,8 @@
 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
 /dts-v1/;
 
+#include <dt-bindings/clock/econet,en751221-scu.h>
+
 / {
        compatible = "econet,en751221";
        #address-cells = <1>;
@@ -30,6 +32,30 @@
                #interrupt-cells = <1>;
        };
 
+       chip_scu: syscon@1fa20000 {
+               compatible = "econet,en751221-chip-scu", "syscon";
+               reg = <0x1fa20000 0x388>;
+       };
+
+       pcie_phy1: pcie-phy@1fac0000 {
+               compatible = "econet,en751221-pcie-gen2";
+               reg = <0x1fac0000 0x1000>;
+               #phy-cells = <0>;
+       };
+
+       pcie_phy0: pcie-phy@1faf2000 {
+               compatible = "econet,en751221-pcie-gen1";
+               reg = <0x1faf2000 0x1000>;
+               #phy-cells = <0>;
+       };
+
+       scuclk: clock-controller@1fb00000 {
+               compatible = "econet,en751221-scu";
+               reg = <0x1fb00000 0x970>;
+               #clock-cells = <1>;
+               #reset-cells = <1>;
+       };
+
        intc: interrupt-controller@1fb40000 {
                compatible = "econet,en751221-intc";
                reg = <0x1fb40000 0x100>;
@@ -41,6 +67,94 @@
                econet,shadow-interrupts = <7 2>, <8 3>, <13 12>, <30 29>;
        };
 
+       pciecfg: pciecfg@1fb80000 {
+               compatible = "mediatek,generic-pciecfg", "syscon";
+               reg = <0x1fb80000 0x1000>;
+       };
+
+       pcie0: pcie@1fb81000 {
+               compatible = "econet,en7528-pcie";
+               device_type = "pci";
+               reg = <0x1fb81000 0x1000>;
+               reg-names = "port0";
+               linux,pci-domain = <0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               interrupt-parent = <&intc>;
+               interrupts = <23>;
+               interrupt-names = "pcie_irq";
+               clocks = <&scuclk EN751221_CLK_PCIE>;
+               clock-names = "sys_ck0";
+               phys = <&pcie_phy0>;
+               phy-names = "pcie-phy0";
+               bus-range = <0x00 0xff>;
+               ranges = <0x01000000 0 0x00000000 0x1f600000 0 0x00008000>,
+                        <0x82000000 0 0x20000000 0x20000000 0 0x08000000>;
+               status = "disabled";
+
+               #interrupt-cells = <1>;
+               interrupt-map-mask = <0 0 0 7>;
+               interrupt-map = <0 0 0 1 &pcie_intc0 0>,
+                               <0 0 0 2 &pcie_intc0 1>,
+                               <0 0 0 3 &pcie_intc0 2>,
+                               <0 0 0 4 &pcie_intc0 3>;
+
+               pcie_intc0: interrupt-controller {
+                       interrupt-controller;
+                       #address-cells = <0>;
+                       #interrupt-cells = <1>;
+               };
+
+               slot0: pcie@0,0 {
+                       reg = <0x0000 0 0 0 0>;
+                       device_type = "pci";
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       ranges;
+               };
+       };
+
+       pcie1: pcie@1fb83000 {
+               compatible = "econet,en7528-pcie";
+               device_type = "pci";
+               reg = <0x1fb83000 0x1000>;
+               reg-names = "port1";
+               linux,pci-domain = <1>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               interrupt-parent = <&intc>;
+               interrupts = <24>;
+               interrupt-names = "pcie_irq";
+               clocks = <&scuclk EN751221_CLK_PCIE>;
+               clock-names = "sys_ck1";
+               phys = <&pcie_phy1>;
+               phy-names = "pcie-phy1";
+               bus-range = <0x00 0xff>;
+               ranges = <0x81000000 0 0x00000000 0x1f608000 0 0x00008000>,
+                        <0x82000000 0 0x28000000 0x28000000 0 0x08000000>;
+               status = "disabled";
+
+               #interrupt-cells = <1>;
+               interrupt-map-mask = <0 0 0 7>;
+               interrupt-map = <0 0 0 1 &pcie_intc1 0>,
+                               <0 0 0 2 &pcie_intc1 1>,
+                               <0 0 0 3 &pcie_intc1 2>,
+                               <0 0 0 4 &pcie_intc1 3>;
+
+               pcie_intc1: interrupt-controller {
+                       interrupt-controller;
+                       #address-cells = <0>;
+                       #interrupt-cells = <1>;
+               };
+
+               slot1: pcie@1,0 {
+                       reg = <0x0800 0 0 0 0>;
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       ranges;
+               };
+       };
+
        uart: serial@1fbf0000 {
                compatible = "ns16550";
                reg = <0x1fbf0000 0x30>;

diff --git a/arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts b/arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts
index 8223c5bce67f22da349944efc45970cd32702702..c633bf73add6e3d5f50d9a045c6e60dcd4abbda0 100644 (file)
--- a/arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts
+++ b/arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts
@@ -17,3 +17,24 @@
                linux,usable-memory-range = <0x00020000 0x1bfe0000>;
        };
 };
+
+&pcie0 {
+       status = "okay";
+};
+&slot0 {
+       wifi@0,0 {
+               /* MT7612E */
+               compatible = "mediatek,mt76";
+               reg = <0x0000 0 0 0 0>;
+       };
+};
+&pcie1 {
+       status = "okay";
+};
+&slot1 {
+       wifi@0,0 {
+               /* MT7592 */
+               compatible = "mediatek,mt76";
+               reg = <0x0000 0 0 0 0>;
+       };
+};

diff --git a/arch/mips/econet/Kconfig b/arch/mips/econet/Kconfig
index fd69884cc9a85eea9d17c9dd79c999d8beeb9602..b37b9d25d5a4e937b4474e4d9220c2cb9c572db8 100644 (file)
--- a/arch/mips/econet/Kconfig
+++ b/arch/mips/econet/Kconfig
@@ -13,7 +13,9 @@ choice
                bool "EN751221 family"
                select COMMON_CLK
                select ECONET_EN751221_INTC
+               select HAVE_PCI
                select IRQ_MIPS_CPU
+               select PCI_DRIVERS_GENERIC
                select SMP
                select SMP_UP
                select SYS_SUPPORTS_SMP