Revert "x86/APX: drop AMX-TRANSPOSE promoted insns"

This reverts commit bafcf0823c1ae4c2201670225c9cf14ccf2abc67.

The patch (the removal) was done on the wrong assumption that
it was only the APX-promoted forms which would be dropped
because the APX spec was updated ahead of ISE and there was no
info that AMX-TRANSPOSE would be de-published at that time.
Given the current situation, since we will choose to disable
AMX-TRANSPOSE but not to remove the support in Binutils, we will
also not remove the APX support.

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 7b508d790b5de8894d603b7b97aef010bff89e92..615824026c86a238f75d2fd6ff3f7d699941ef60 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -2303,7 +2303,8 @@ cpu_flags_match (const insn_template *t)
              || any.bitfield.cpuavx512f || any.bitfield.cpuavx512bw
              || any.bitfield.cpuavx512dq || any.bitfield.cpuamx_tile
              || any.bitfield.cpucmpccxadd || any.bitfield.cpuuser_msr
-             || any.bitfield.cpumsr_imm || any.bitfield.cpuamx_movrs))
+             || any.bitfield.cpumsr_imm || any.bitfield.cpuamx_transpose
+             || any.bitfield.cpuamx_movrs))
        {
          /* These checks (verifying that APX_F() was properly used in the
             opcode table entry) make sure there's no need for an "else" to
@@ -4207,7 +4208,8 @@ install_template (const insn_template *t)
           || maybe_cpu (t, CpuAVX512F) || maybe_cpu (t, CpuAVX512DQ)
           || maybe_cpu (t, CpuAVX512BW) || maybe_cpu (t, CpuBMI)
           || maybe_cpu (t, CpuBMI2) || maybe_cpu (t, CpuUSER_MSR)
-          || maybe_cpu (t, CpuMSR_IMM) || maybe_cpu (t, CpuAMX_MOVRS))
+          || maybe_cpu (t, CpuMSR_IMM) || maybe_cpu (t, CpuAMX_TRANSPOSE)
+          || maybe_cpu (t, CpuAMX_MOVRS))
          && maybe_cpu (t, CpuAPX_F))
        {
          if (need_evex_encoding (t))

diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d
index 68c73e9385c790812f5ab73d5760525bf21130a7..d5476d3dff3f2a278f82e8ee19b9f9e0e24ca3ef 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d
@@ -139,6 +139,14 @@ Disassembly of section \.text:
 [       ]*[a-f0-9]+:[   ]*62 52 87 00 f7 df[    ]+shrx[         ]+r11,r15,r31
 [       ]*[a-f0-9]+:[   ]*62 5a 87 00 f7 bc 87 23 01 00 00[     ]+shrx[         ]+r15,QWORD PTR \[r31\+rax\*4\+0x123\],r31
 [       ]*[a-f0-9]+:[   ]*62 da 7d 08 49 84 87 23 01 00 00[     ]+sttilecfg[    ]+\[r31\+rax\*4\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 da 7c 08 6e b4 c7 23 01 00 00[     ]+t2rpntlvwz0 tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 dd 7c 08 f8 b4 c7 23 01 00 00[     ]+t2rpntlvwz0rs tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 dd 7c 08 f9 b4 c7 23 01 00 00[     ]+t2rpntlvwz0rst1 tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 da 7c 08 6f b4 c7 23 01 00 00[     ]+t2rpntlvwz0t1 tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 da 7d 08 6e b4 c7 23 01 00 00[     ]+t2rpntlvwz1 tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 dd 7d 08 f8 b4 c7 23 01 00 00[     ]+t2rpntlvwz1rs tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 dd 7d 08 f9 b4 c7 23 01 00 00[     ]+t2rpntlvwz1rst1 tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 da 7d 08 6f b4 c7 23 01 00 00[     ]+t2rpntlvwz1t1 tmm6,\[r31\+rax\*8\+0x123\]
 [       ]*[a-f0-9]+:[   ]*62 da 7f 08 4b b4 87 23 01 00 00[     ]+tileloadd tmm6,\[r31\+rax\*4\+0x123\]
 [       ]*[a-f0-9]+:[   ]*62 b2 7b 08 4a b4 fd 00 00 00 10[     ]+tileloaddrs[  ]+tmm6,\[rbp\+r31\*8\+0x10000000\]
 [       ]*[a-f0-9]+:[   ]*62 fa 7f 08 4a 1c 20[         ]+tileloaddrs[  ]+tmm3,\[r16\+riz\*1\]
@@ -278,6 +286,14 @@ Disassembly of section \.text:
 [       ]*[a-f0-9]+:[   ]*62 52 87 00 f7 df[    ]+shrx[         ]+r11,r15,r31
 [       ]*[a-f0-9]+:[   ]*62 5a 87 00 f7 bc 87 23 01 00 00[     ]+shrx[         ]+r15,QWORD PTR \[r31\+rax\*4\+0x123\],r31
 [       ]*[a-f0-9]+:[   ]*62 da 7d 08 49 84 87 23 01 00 00[     ]+sttilecfg[    ]+\[r31\+rax\*4\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 da 7c 08 6e b4 c7 23 01 00 00[     ]+t2rpntlvwz0 tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 dd 7c 08 f8 b4 c7 23 01 00 00[     ]+t2rpntlvwz0rs tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 dd 7c 08 f9 b4 c7 23 01 00 00[     ]+t2rpntlvwz0rst1 tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 da 7c 08 6f b4 c7 23 01 00 00[     ]+t2rpntlvwz0t1 tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 da 7d 08 6e b4 c7 23 01 00 00[     ]+t2rpntlvwz1 tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 dd 7d 08 f8 b4 c7 23 01 00 00[     ]+t2rpntlvwz1rs tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 dd 7d 08 f9 b4 c7 23 01 00 00[     ]+t2rpntlvwz1rst1 tmm6,\[r31\+rax\*8\+0x123\]
+[       ]*[a-f0-9]+:[   ]*62 da 7d 08 6f b4 c7 23 01 00 00[     ]+t2rpntlvwz1t1 tmm6,\[r31\+rax\*8\+0x123\]
 [       ]*[a-f0-9]+:[   ]*62 da 7f 08 4b b4 87 23 01 00 00[     ]+tileloadd tmm6,\[r31\+rax\*4\+0x123\]
 [       ]*[a-f0-9]+:[   ]*62 b2 7b 08 4a b4 fd 00 00 00 10[     ]+tileloaddrs[  ]+tmm6,\[rbp\+r31\*8\+0x10000000\]
 [       ]*[a-f0-9]+:[   ]*62 fa 7f 08 4a 1c 20[         ]+tileloaddrs[  ]+tmm3,\[r16\+riz\*1\]

diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d
index 3ced6d5d90ceb5cb98f4a938d8f0968315aee448..c445a44df97d652ec4511e34d4e6fb95eed7d112 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d
@@ -139,6 +139,14 @@ Disassembly of section \.text:
 [       ]*[a-f0-9]+:[   ]*62 52 87 00 f7 df[    ]+shrx[         ]+%r31,%r15,%r11
 [       ]*[a-f0-9]+:[   ]*62 5a 87 00 f7 bc 87 23 01 00 00[     ]+shrx[         ]+%r31,0x123\(%r31,%rax,4\),%r15
 [       ]*[a-f0-9]+:[   ]*62 da 7d 08 49 84 87 23 01 00 00[     ]+sttilecfg[    ]+0x123\(%r31,%rax,4\)
+[       ]*[a-f0-9]+:[   ]*62 da 7c 08 6e b4 c7 23 01 00 00[     ]+t2rpntlvwz0[  ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7c 08 f8 b4 c7 23 01 00 00[     ]+t2rpntlvwz0rs[        ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7c 08 f9 b4 c7 23 01 00 00[     ]+t2rpntlvwz0rst1[      ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 da 7c 08 6f b4 c7 23 01 00 00[     ]+t2rpntlvwz0t1[        ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 da 7d 08 6e b4 c7 23 01 00 00[     ]+t2rpntlvwz1[  ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7d 08 f8 b4 c7 23 01 00 00[     ]+t2rpntlvwz1rs[        ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7d 08 f9 b4 c7 23 01 00 00[     ]+t2rpntlvwz1rst1[      ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 da 7d 08 6f b4 c7 23 01 00 00[     ]+t2rpntlvwz1t1[        ]+0x123\(%r31,%rax,8\),%tmm6
 [       ]*[a-f0-9]+:[   ]*62 da 7f 08 4b b4 87 23 01 00 00[     ]+tileloadd[    ]+0x123\(%r31,%rax,4\),%tmm6
 [       ]*[a-f0-9]+:[   ]*62 b2 7b 08 4a b4 fd 00 00 00 10[     ]+tileloaddrs[  ]+0x10000000\(%rbp,%r31,8\),%tmm6
 [       ]*[a-f0-9]+:[   ]*62 fa 7f 08 4a 1c 20[         ]+tileloaddrs[  ]+\(%r16,%riz,1\),%tmm3
@@ -278,6 +286,14 @@ Disassembly of section \.text:
 [       ]*[a-f0-9]+:[   ]*62 52 87 00 f7 df[    ]+shrx[         ]+%r31,%r15,%r11
 [       ]*[a-f0-9]+:[   ]*62 5a 87 00 f7 bc 87 23 01 00 00[     ]+shrx[         ]+%r31,0x123\(%r31,%rax,4\),%r15
 [       ]*[a-f0-9]+:[   ]*62 da 7d 08 49 84 87 23 01 00 00[     ]+sttilecfg[    ]+0x123\(%r31,%rax,4\)
+[       ]*[a-f0-9]+:[   ]*62 da 7c 08 6e b4 c7 23 01 00 00[     ]+t2rpntlvwz0[  ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7c 08 f8 b4 c7 23 01 00 00[     ]+t2rpntlvwz0rs[        ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7c 08 f9 b4 c7 23 01 00 00[     ]+t2rpntlvwz0rst1[      ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 da 7c 08 6f b4 c7 23 01 00 00[     ]+t2rpntlvwz0t1[        ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 da 7d 08 6e b4 c7 23 01 00 00[     ]+t2rpntlvwz1[  ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7d 08 f8 b4 c7 23 01 00 00[     ]+t2rpntlvwz1rs[        ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7d 08 f9 b4 c7 23 01 00 00[     ]+t2rpntlvwz1rst1[      ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 da 7d 08 6f b4 c7 23 01 00 00[     ]+t2rpntlvwz1t1[        ]+0x123\(%r31,%rax,8\),%tmm6
 [       ]*[a-f0-9]+:[   ]*62 da 7f 08 4b b4 87 23 01 00 00[     ]+tileloadd[    ]+0x123\(%r31,%rax,4\),%tmm6
 [       ]*[a-f0-9]+:[   ]*62 b2 7b 08 4a b4 fd 00 00 00 10[     ]+tileloaddrs[  ]+0x10000000\(%rbp,%r31,8\),%tmm6
 [       ]*[a-f0-9]+:[   ]*62 fa 7f 08 4a 1c 20[         ]+tileloaddrs[  ]+\(%r16,%riz,1\),%tmm3

diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d
index 64498ff088f5943a5018cff9a29b511d6f9f25ed..d9ebf3b1d531080fdc4d772208249f8c1df1c61d 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d
@@ -139,6 +139,14 @@ Disassembly of section \.text:
 [       ]*[a-f0-9]+:[   ]*62 52 87 00 f7 df[    ]+shrx[         ]+%r31,%r15,%r11
 [       ]*[a-f0-9]+:[   ]*62 5a 87 00 f7 bc 87 23 01 00 00[     ]+shrx[         ]+%r31,0x123\(%r31,%rax,4\),%r15
 [       ]*[a-f0-9]+:[   ]*62 da 7d 08 49 84 87 23 01 00 00[     ]+sttilecfg[    ]+0x123\(%r31,%rax,4\)
+[       ]*[a-f0-9]+:[   ]*62 da 7c 08 6e b4 c7 23 01 00 00[     ]+t2rpntlvwz0[  ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7c 08 f8 b4 c7 23 01 00 00[     ]+t2rpntlvwz0rs[        ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7c 08 f9 b4 c7 23 01 00 00[     ]+t2rpntlvwz0rst1[      ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 da 7c 08 6f b4 c7 23 01 00 00[     ]+t2rpntlvwz0t1[        ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 da 7d 08 6e b4 c7 23 01 00 00[     ]+t2rpntlvwz1[  ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7d 08 f8 b4 c7 23 01 00 00[     ]+t2rpntlvwz1rs[        ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7d 08 f9 b4 c7 23 01 00 00[     ]+t2rpntlvwz1rst1[      ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 da 7d 08 6f b4 c7 23 01 00 00[     ]+t2rpntlvwz1t1[        ]+0x123\(%r31,%rax,8\),%tmm6
 [       ]*[a-f0-9]+:[   ]*62 da 7f 08 4b b4 87 23 01 00 00[     ]+tileloadd[    ]+0x123\(%r31,%rax,4\),%tmm6
 [       ]*[a-f0-9]+:[   ]*62 b2 7b 08 4a b4 fd 00 00 00 10[     ]+tileloaddrs[  ]+0x10000000\(%rbp,%r31,8\),%tmm6
 [       ]*[a-f0-9]+:[   ]*62 fa 7f 08 4a 1c 20[         ]+tileloaddrs[  ]+\(%r16,%riz,1\),%tmm3
@@ -278,6 +286,14 @@ Disassembly of section \.text:
 [       ]*[a-f0-9]+:[   ]*62 52 87 00 f7 df[    ]+shrx[         ]+%r31,%r15,%r11
 [       ]*[a-f0-9]+:[   ]*62 5a 87 00 f7 bc 87 23 01 00 00[     ]+shrx[         ]+%r31,0x123\(%r31,%rax,4\),%r15
 [       ]*[a-f0-9]+:[   ]*62 da 7d 08 49 84 87 23 01 00 00[     ]+sttilecfg[    ]+0x123\(%r31,%rax,4\)
+[       ]*[a-f0-9]+:[   ]*62 da 7c 08 6e b4 c7 23 01 00 00[     ]+t2rpntlvwz0[  ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7c 08 f8 b4 c7 23 01 00 00[     ]+t2rpntlvwz0rs[        ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7c 08 f9 b4 c7 23 01 00 00[     ]+t2rpntlvwz0rst1[      ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 da 7c 08 6f b4 c7 23 01 00 00[     ]+t2rpntlvwz0t1[        ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 da 7d 08 6e b4 c7 23 01 00 00[     ]+t2rpntlvwz1[  ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7d 08 f8 b4 c7 23 01 00 00[     ]+t2rpntlvwz1rs[        ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 dd 7d 08 f9 b4 c7 23 01 00 00[     ]+t2rpntlvwz1rst1[      ]+0x123\(%r31,%rax,8\),%tmm6
+[       ]*[a-f0-9]+:[   ]*62 da 7d 08 6f b4 c7 23 01 00 00[     ]+t2rpntlvwz1t1[        ]+0x123\(%r31,%rax,8\),%tmm6
 [       ]*[a-f0-9]+:[   ]*62 da 7f 08 4b b4 87 23 01 00 00[     ]+tileloadd[    ]+0x123\(%r31,%rax,4\),%tmm6
 [       ]*[a-f0-9]+:[   ]*62 b2 7b 08 4a b4 fd 00 00 00 10[     ]+tileloaddrs[  ]+0x10000000\(%rbp,%r31,8\),%tmm6
 [       ]*[a-f0-9]+:[   ]*62 fa 7f 08 4a 1c 20[         ]+tileloaddrs[  ]+\(%r16,%riz,1\),%tmm3

diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s
index f95ff503281d11a26c3841d751acdc30c3f69b41..f0bcb3a9bebbd7e3d12d41323fe1616c1e195bea 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s
@@ -133,6 +133,14 @@ _start:
        shrx    %r31,%r15,%r11
        shrx    %r31,0x123(%r31,%rax,4),%r15
        sttilecfg       0x123(%r31,%rax,4)
+       t2rpntlvwz0     0x123(%r31,%rax,8),%tmm6
+       t2rpntlvwz0rs   0x123(%r31,%rax,8),%tmm6
+       t2rpntlvwz0rst1 0x123(%r31,%rax,8),%tmm6
+       t2rpntlvwz0t1   0x123(%r31,%rax,8),%tmm6
+       t2rpntlvwz1     0x123(%r31,%rax,8),%tmm6
+       t2rpntlvwz1rs   0x123(%r31,%rax,8),%tmm6
+       t2rpntlvwz1rst1 0x123(%r31,%rax,8),%tmm6
+       t2rpntlvwz1t1   0x123(%r31,%rax,8),%tmm6
        tileloadd       0x123(%r31,%rax,4),%tmm6
        tileloaddrs     0x10000000(%rbp, %r31, 8), %tmm6
        tileloaddrs     (%r16), %tmm3
@@ -274,6 +282,14 @@ _start:
        shrx    r11,r15,r31
        shrx    r15,QWORD PTR [r31+rax*4+0x123],r31
        sttilecfg       [r31+rax*4+0x123]
+       t2rpntlvwz0     tmm6,[r31+rax*8+0x123]
+       t2rpntlvwz0rs   tmm6,[r31+rax*8+0x123]
+       t2rpntlvwz0rst1 tmm6,[r31+rax*8+0x123]
+       t2rpntlvwz0t1   tmm6,[r31+rax*8+0x123]
+       t2rpntlvwz1     tmm6,[r31+rax*8+0x123]
+       t2rpntlvwz1rs   tmm6,[r31+rax*8+0x123]
+       t2rpntlvwz1rst1 tmm6,[r31+rax*8+0x123]
+       t2rpntlvwz1t1   tmm6,[r31+rax*8+0x123]
        tileloadd       tmm6,[r31+rax*4+0x123]
        tileloaddrs     tmm6, [rbp+r31*8+0x10000000]
        tileloaddrs     tmm3, [r16]

diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 5281ab6ab9e981c794598de8920f339a07aac232..3c24c224efcfdfb9973ca6a7c968454c16104f5c 100644 (file)
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -416,8 +416,8 @@ static const struct dis386 evex_table[][256] = {
     { Bad_Opcode },
     { Bad_Opcode },
     { X86_64_TABLE (X86_64_EVEX_0F386D) },
-    { Bad_Opcode },
-    { Bad_Opcode },
+    { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F386E) },
+    { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F386F) },
     /* 70 */
     { VEX_W_TABLE (EVEX_W_0F3870) },
     { "vpshldv%DQ",  { XM, Vex, EXx }, PREFIX_DATA },

diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index e0ccd538e99de02e0bb3b08e6b9fff72b498956c..6ba7764449c2d96c6365b840a9ea2d51e801b0a4 100644 (file)
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -1049,6 +1049,20 @@ process_i386_cpu_flag (FILE *table, char *flag,
          all[Cpu64].value = 1;
 
       output_cpu_flags(table, all, ARRAY_SIZE (all), -1, comma, indent, lineno);
+
+      /* For APX_F extension of multiple cpuid enabled insns, we cannot use
+        APX_F(cpuid_A&cpuid_B) in the opcode table, as the result would fail
+        to be parsed.  Furthermore, the result also wouldn't be quite valid.
+        However, the assembler's cpu_flags_match() will simply propagate "any"
+        to "all", zapping "any" afterwards altogether.  IOW in this situation
+        both masks have "&&" meaning.  Set the missing flag here.  */
+      if (all[CpuAMX_TRANSPOSE].value && all[CpuAMX_MOVRS].value)
+       {
+         if (!any[CpuAPX_F].value || !any[CpuAMX_MOVRS].value)
+           fail ("%s: %d: internal error: APX_F=%d AMX_MOVRS=%d\n",
+                 filename, lineno, any[CpuAPX_F].value, any[CpuAMX_MOVRS].value);
+         any[CpuAMX_TRANSPOSE].value = 1;
+       }
     }
 
   output_cpu_flags (table, any, ARRAY_SIZE (any), name != NULL,

diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 6cd52c26ba18d939e98df300df6a9cc7f80d1d39..1cf3d5d468864918ab0c2c98b614adb8176ac0f7 100644 (file)
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3247,8 +3247,8 @@ tilezero, 0xf249, AMX_TILE, Modrm|Vex128|Space0F38|VexW0|NoSuf, { RegTMM }
 
 <loc:opc, $t:0x0, t1:0x1>
 
-t2rpntlvw<z><loc>, 0x<z:pfx>6e | <loc:opc>, AMX_TRANSPOSE, Sibmem|Vex128|Space0F38|VexW0|NoSuf|ImplicitGroup, { Unspecified|BaseIndex, RegTMM }
-t2rpntlvw<z>rs<loc>, 0x<z:pfx>f8 | <loc:opc>, AMX_TRANSPOSE&AMX_MOVRS, Sibmem|Vex128|Map5|VexW0|NoSuf|ImplicitGroup, { Unspecified|BaseIndex, RegTMM }
+t2rpntlvw<z><loc>, 0x<z:pfx>6e | <loc:opc>, APX_F(AMX_TRANSPOSE), Sibmem|Vex128|EVex128|Space0F38|VexW0|NoSuf|ImplicitGroup, { Unspecified|BaseIndex, RegTMM }
+t2rpntlvw<z>rs<loc>, 0x<z:pfx>f8 | <loc:opc>, AMX_TRANSPOSE&APX_F(AMX_MOVRS), Sibmem|Vex128|EVex128|Map5|VexW0|NoSuf|ImplicitGroup, { Unspecified|BaseIndex, RegTMM }
 
 <z>
 <loc>

diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 9eff27797b09f69d1783d042af5cc2422fdb8455..6341f55ab076bb322140645b94907a3bf1e47439 100644 (file)
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -43226,80 +43226,80 @@ static const insn_template i386_optab[] =
          0, 0, 0, 1, 0, 0 } } } },
   { MN_t2rpntlvwz0, 0x6e | 0x0, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 1, 0, 1, 0, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 1, 0 } },
       { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 1, 0, 0 } } } },
   { MN_t2rpntlvwz0t1, 0x6e | 0x1, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 1, 0, 1, 0, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 1, 0 } },
       { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 1, 0, 0 } } } },
   { MN_t2rpntlvwz1, 0x6e | 0x0, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 1, 0, 1, 1, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 1, 0 } },
       { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 1, 0, 0 } } } },
   { MN_t2rpntlvwz1t1, 0x6e | 0x1, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 1, 0, 1, 1, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 1, 0 } },
       { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 1, 0, 0 } } } },
   { MN_t2rpntlvwz0rs, 0xf8 | 0x0, 2, SPACE_MAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 1, 0, 1, 0, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 119, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 119, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 1, 0 } },
       { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 1, 0, 0 } } } },
   { MN_t2rpntlvwz0rst1, 0xf8 | 0x1, 2, SPACE_MAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 1, 0, 1, 0, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 119, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 119, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 1, 0 } },
       { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 1, 0, 0 } } } },
   { MN_t2rpntlvwz1rs, 0xf8 | 0x0, 2, SPACE_MAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 1, 0, 1, 1, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 119, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 119, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 1, 0 } },
       { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 1, 0, 0 } } } },
   { MN_t2rpntlvwz1rst1, 0xf8 | 0x1, 2, SPACE_MAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 1, 0, 1, 1, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 119, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 119, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 1, 0 } },
       { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,