drm/amdgpu: Add reserved region ids

Add reserved regions and helper functions to memory manager.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index afaaab6496def0babfd105ad1751a1b9719c389c..8f0b13a39b61f75cdf44423e825f64ae370644a3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1671,6 +1671,64 @@ static struct ttm_device_funcs amdgpu_bo_driver = {
        .access_memory = &amdgpu_ttm_access_memory,
 };
 
+void amdgpu_ttm_init_vram_resv(struct amdgpu_device *adev,
+                               enum amdgpu_resv_region_id id,
+                               uint64_t offset, uint64_t size,
+                               bool needs_cpu_map)
+{
+       struct amdgpu_vram_resv *resv;
+
+       if (id >= AMDGPU_RESV_MAX)
+               return;
+
+       resv = &adev->mman.resv_region[id];
+       resv->offset = offset;
+       resv->size = size;
+       resv->needs_cpu_map = needs_cpu_map;
+}
+
+int amdgpu_ttm_mark_vram_reserved(struct amdgpu_device *adev,
+                                 enum amdgpu_resv_region_id id)
+{
+       struct amdgpu_vram_resv *resv;
+       int ret;
+
+       if (id >= AMDGPU_RESV_MAX)
+               return -EINVAL;
+
+       resv = &adev->mman.resv_region[id];
+       if (!resv->size)
+               return 0;
+
+       ret = amdgpu_bo_create_kernel_at(adev, resv->offset, resv->size,
+                                        &resv->bo,
+                                        resv->needs_cpu_map ? &resv->cpu_ptr : NULL);
+       if (ret) {
+               dev_dbg(adev->dev, "reserve vram failed: id=%d offset=0x%llx size=0x%llx ret=%d\n",
+                       id, resv->offset, resv->size, ret);
+               memset(resv, 0, sizeof(*resv));
+       }
+
+       return ret;
+}
+
+void amdgpu_ttm_unmark_vram_reserved(struct amdgpu_device *adev,
+                                    enum amdgpu_resv_region_id id)
+{
+       struct amdgpu_vram_resv *resv;
+
+       if (id >= AMDGPU_RESV_MAX)
+               return;
+
+       resv = &adev->mman.resv_region[id];
+       if (!resv->bo)
+               return;
+
+       amdgpu_bo_free_kernel(&resv->bo, NULL,
+                             resv->needs_cpu_map ? &resv->cpu_ptr : NULL);
+       memset(resv, 0, sizeof(*resv));
+}
+
 /*
  * Firmware Reservation functions
  */

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 3b19736114461a835359dbff362c44ff6057eac9..7c49fe56a1dfac4b12ee80f099f4f7050631360c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -59,6 +59,26 @@ struct amdgpu_ttm_buffer_entity {
        u64                     gart_window_offs[2];
 };
 
+enum amdgpu_resv_region_id {
+       AMDGPU_RESV_STOLEN_VGA,
+       AMDGPU_RESV_STOLEN_EXTENDED,
+       AMDGPU_RESV_STOLEN_RESERVED,
+       AMDGPU_RESV_FW,
+       AMDGPU_RESV_FW_EXTEND,
+       AMDGPU_RESV_FW_VRAM_USAGE,
+       AMDGPU_RESV_DRV_VRAM_USAGE,
+       AMDGPU_RESV_MEM_TRAIN,
+       AMDGPU_RESV_MAX
+};
+
+struct amdgpu_vram_resv {
+       uint64_t                offset;
+       uint64_t                size;
+       struct amdgpu_bo        *bo;
+       void                    *cpu_ptr;
+       bool                    needs_cpu_map;
+};
+
 struct amdgpu_mman {
        struct ttm_device               bdev;
        struct ttm_pool                 *ttm_pools;
@@ -109,6 +129,8 @@ struct amdgpu_mman {
        struct amdgpu_bo        *drv_vram_usage_reserved_bo;
        void            *drv_vram_usage_va;
 
+       struct amdgpu_vram_resv         resv_region[AMDGPU_RESV_MAX];
+
        /* PAGE_SIZE'd BO for process memory r/w over SDMA. */
        struct amdgpu_bo        *sdma_access_bo;
        void                    *sdma_access_ptr;
@@ -175,6 +197,15 @@ void amdgpu_vram_mgr_clear_reset_blocks(struct amdgpu_device *adev);
 bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,
                            struct ttm_resource *res);
 
+void amdgpu_ttm_init_vram_resv(struct amdgpu_device *adev,
+                               enum amdgpu_resv_region_id id,
+                               uint64_t offset, uint64_t size,
+                               bool needs_cpu_map);
+int amdgpu_ttm_mark_vram_reserved(struct amdgpu_device *adev,
+                                 enum amdgpu_resv_region_id id);
+void amdgpu_ttm_unmark_vram_reserved(struct amdgpu_device *adev,
+                                    enum amdgpu_resv_region_id id);
+
 int amdgpu_ttm_init(struct amdgpu_device *adev);
 void amdgpu_ttm_fini(struct amdgpu_device *adev);
 void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,