]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: ti: k3-am62l-main: Add RNG node
authorShiva Tripathi <s-tripathi1@ti.com>
Mon, 9 Mar 2026 10:16:50 +0000 (15:46 +0530)
committerVignesh Raghavendra <vigneshr@ti.com>
Tue, 10 Mar 2026 09:42:21 +0000 (15:12 +0530)
Add EIP76 Random Number Generator (RNG) node for AM62L SoC. Unlike
other k3 platforms, AM62L RNG is integrated outside crypto subsystem
at address 0x3b100000, requiring an additional entry in cbass_main
memory map.

Mark the RNG node with status "reserved" as it is intended for use by
OP-TEE for secure random number generation. If required, this hardware
can also be used through Linux kernel by enabling this node.

Signed-off-by: Shiva Tripathi <s-tripathi1@ti.com>
Link: https://patch.msgid.link/20260309101650.1652240-1-s-tripathi1@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm64/boot/dts/ti/k3-am62l-main.dtsi
arch/arm64/boot/dts/ti/k3-am62l.dtsi

index 883beb76ba9c48c87e256b0d72e7f938239d0a4f..80615ca1e01a2266ac90ecfdf8f789fcaa84eeb6 100644 (file)
                status = "disabled";
        };
 
+       rng: rng@3b100000 {
+               compatible = "inside-secure,safexcel-eip76";
+               reg = <0x00 0x3b100000 0x00 0x7d>;
+               interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+               status = "reserved"; /* Reserved for OP-TEE */
+       };
+
        oc_sram: sram@70800000 {
                compatible = "mmio-sram";
                reg = <0x00 0x70800000 0x00 0x10000>;
index e01e342c26daaa06a72036cc3a9a7b13a60e6738..28bb6ef2194f162792a5d6e7749dd5ebc1fe521c 100644 (file)
@@ -79,6 +79,7 @@
                         <0x00 0x31000000 0x00 0x31000000 0x00 0x00050000>, /* USB0 DWC3 Core Window */
                         <0x00 0x31100000 0x00 0x31100000 0x00 0x00050000>, /* USB1 DWC3 Core Window */
                         <0x00 0x3b000000 0x00 0x3b000000 0x00 0x00000400>, /* GPMC0 */
+                        <0x00 0x3b100000 0x00 0x3b100000 0x00 0x0000007d>, /* RNG */
                         <0x00 0x45810000 0x00 0x45810000 0x00 0x03170000>, /* DMSS */
                         <0x00 0x50000000 0x00 0x50000000 0x00 0x08000000>, /* GPMC DATA */
                         <0x00 0x60000000 0x00 0x60000000 0x00 0x08000000>, /* FSS DAT1 */