]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
interconnect: qcom: eliza: Add SDCC1 slave node
authorAbel Vesa <abel.vesa@oss.qualcomm.com>
Thu, 14 May 2026 13:36:24 +0000 (16:36 +0300)
committerGeorgi Djakov <djakov@kernel.org>
Fri, 15 May 2026 07:21:19 +0000 (10:21 +0300)
The Eliza interconnect provider is missing the SDCC1 CNOC CFG slave
node. Add qhs_sdc1 to the provider node table so SDCC1 interconnect
paths can resolve to a provider node.

Hook qhs_sdc1 up to qsm_cfg and CN0, and bump the corresponding
qsm_cfg.num_links and bcm_cn0.num_nodes counts.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20260514-eliza-interconnect-add-missing-sdcc1-slave-node-v2-2-13c03bc890cb@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
drivers/interconnect/qcom/eliza.c

index a4f7903f0524d0db5ea2e378e644111e84f5532b..891e4e6e8ba8fd99ec3e9633df7c75916bd36514 100644 (file)
@@ -127,6 +127,12 @@ static struct qcom_icc_node qhs_qup2 = {
        .buswidth = 4,
 };
 
+static struct qcom_icc_node qhs_sdc1 = {
+       .name = "qhs_sdc1",
+       .channels = 1,
+       .buswidth = 4,
+};
+
 static struct qcom_icc_node qhs_sdc2 = {
        .name = "qhs_sdc2",
        .channels = 1,
@@ -383,7 +389,7 @@ static struct qcom_icc_node qsm_cfg = {
        .name = "qsm_cfg",
        .channels = 1,
        .buswidth = 4,
-       .num_links = 29,
+       .num_links = 30,
        .link_nodes = { &qhs_ahb2phy0, &qhs_ahb2phy1,
                        &qhs_camera_cfg, &qhs_clk_ctl,
                        &qhs_crypto0_cfg, &qhs_display_cfg,
@@ -392,7 +398,7 @@ static struct qcom_icc_node qsm_cfg = {
                        &qhs_mss_cfg, &qhs_pcie_0_cfg,
                        &qhs_prng, &qhs_qdss_cfg,
                        &qhs_qspi, &qhs_qup1,
-                       &qhs_qup2, &qhs_sdc2,
+                       &qhs_qup2, &qhs_sdc1, &qhs_sdc2,
                        &qhs_tcsr, &qhs_tlmm,
                        &qhs_ufs_mem_cfg, &qhs_usb3_0,
                        &qhs_venus_cfg, &qhs_vsense_ctrl_cfg,
@@ -1111,7 +1117,7 @@ static struct qcom_icc_bcm bcm_cn0 = {
        .name = "CN0",
        .enable_mask = BIT(0),
        .keepalive = true,
-       .num_nodes = 43,
+       .num_nodes = 44,
        .nodes = { &qsm_cfg, &qhs_ahb2phy0,
                   &qhs_ahb2phy1, &qhs_camera_cfg,
                   &qhs_clk_ctl, &qhs_crypto0_cfg,
@@ -1119,7 +1125,7 @@ static struct qcom_icc_bcm bcm_cn0 = {
                   &qhs_i3c_ibi1_cfg, &qhs_imem_cfg,
                   &qhs_mss_cfg, &qhs_pcie_0_cfg,
                   &qhs_prng, &qhs_qdss_cfg,
-                  &qhs_qspi, &qhs_sdc2,
+                  &qhs_qspi, &qhs_sdc1, &qhs_sdc2,
                   &qhs_tcsr, &qhs_tlmm,
                   &qhs_ufs_mem_cfg, &qhs_usb3_0,
                   &qhs_venus_cfg, &qhs_vsense_ctrl_cfg,
@@ -1321,6 +1327,7 @@ static struct qcom_icc_node * const cnoc_cfg_nodes[] = {
        [SLAVE_QSPI_0] = &qhs_qspi,
        [SLAVE_QUP_1] = &qhs_qup1,
        [SLAVE_QUP_2] = &qhs_qup2,
+       [SLAVE_SDCC_1] = &qhs_sdc1,
        [SLAVE_SDCC_2] = &qhs_sdc2,
        [SLAVE_TCSR] = &qhs_tcsr,
        [SLAVE_TLMM] = &qhs_tlmm,