RISC-V: Adjust the scan asm for v[sz]ext.vf2 for v1 and v12

The previous match v1 may match the v12 as well, therefore
add the non-num boundary.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m1.c:
	* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m2.c:
	* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m4.c:
	* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf2.c:
	* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf4.c:
	* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m1.c:
	* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m2.c:
	* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-mf2.c:
	* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m1.c:
	* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m2.c:
	* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf2.c:
	* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf4.c:
	* gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf8.c:

Signed-off-by: Pan Li <pan2.li@intel.com>

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m1.c
index 6b59a0da8eeac811a3078e918efe03f1e9a6cdb4..6508a99b960e8a884337fb39cb9409d19d63b2c9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m1.c
@@ -13,5 +13,5 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vsext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v1} 1 } } */
-/* { dg-final { scan-assembler-times {vsext\.vf2\s+v2,v3} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v1([^0-9]|$)} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v2,v3([^0-9]|$)} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m2.c
index 0396046a7b1a51f1b8da89ab7ebc530c370762f7..6b8c9935d2faa20258247fbb81a1811328a4d461 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m2.c
@@ -13,5 +13,5 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vsext_vf,
   LOOP_UNARY_BODY_X8)
 
-/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v2} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v2([^0-9]|$)} 1 } } */
 /* { dg-final { scan-assembler-times {vsext\.vf2\s+v4,v6} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m4.c
index 1670668d04bbaac204a9b3a827c435d7ae7f77b9..7aded370306039803a3d34d02bb9741d0b2ade11 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-m4.c
@@ -13,5 +13,5 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vsext_vf,
   LOOP_UNARY_BODY_X4)
 
-/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v4} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v4([^0-9]|$)} 1 } } */
 /* { dg-final { scan-assembler-times {vsext\.vf2\s+v8,v12} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf2.c
index e700eb532a99da4f11e78c03a4c8650d78290171..c9c6cb83565998ca1ae049d1b5c0417d90c14006 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf2.c
@@ -13,8 +13,8 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vsext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1} } } */
-/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3([^0-9]|$)} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v4,v5} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v6,v7} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v8,v9} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf4.c
index ca48d17e13d8d52d1efd9aa3d9ff55cb9c119226..4f22473dcd04f6258da060a045e78bfbcb7329fe 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i16-mf4.c
@@ -13,8 +13,8 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vsext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1} } } */
-/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3([^0-9]|$)} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v4,v5} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v6,v7} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v8,v9} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m1.c
index 461f4ef6b1a0b09b308c0eb246b317fcb463bba9..c2d2e38cd282cf5fa041bdd2ef12231ade4f4f8d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m1.c
@@ -13,5 +13,5 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vsext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v1} 1 } } */
-/* { dg-final { scan-assembler-times {vsext\.vf2\s+v2,v3} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v1([^0-9]|$)} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v2,v3([^0-9]|$)} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m2.c
index 6c7d8a5193b60f1cc0ba4cca0ae2352e09047520..e8d61fa50c3391cbc316f640823cb1360e6e725a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-m2.c
@@ -13,5 +13,5 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vsext_vf,
   LOOP_UNARY_BODY_X8)
 
-/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v2} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v2([^0-9]|$)} 1 } } */
 /* { dg-final { scan-assembler-times {vsext\.vf2\s+v4,v6} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-mf2.c
index 4144306df4e2497177aaa74531f478e942d59559..4faf542eff2318f9b9250a41d18a2fa17dab8790 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-mf2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i32-mf2.c
@@ -13,8 +13,8 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vsext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1} } } */
-/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3([^0-9]|$)} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v4,v5} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v6,v7} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v8,v9} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m1.c
index 7a4ecd72d188fb37b10b2209e3e2e21df253cbec..381cf6934fb84a7c298c326f7c4a3de8115c6799 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m1.c
@@ -13,5 +13,5 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vsext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v1} 1 } } */
-/* { dg-final { scan-assembler-times {vsext\.vf2\s+v2,v3} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v1([^0-9]|$)} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v2,v3([^0-9]|$)} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m2.c
index 318360f93744d5b0175aabd93254f3ec9481b0bb..a292cfb8370a61d0ddd8704724acaac260ee3f63 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-m2.c
@@ -13,5 +13,5 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vsext_vf,
   LOOP_UNARY_BODY_X8)
 
-/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v2} 1 } } */
+/* { dg-final { scan-assembler-times {vsext\.vf2\s+v0,v2([^0-9]|$)} 1 } } */
 /* { dg-final { scan-assembler-times {vsext\.vf2\s+v4,v6} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf2.c
index fde319ec37af9ca7403d9974784ce2fa146b056b..ab9b030705821b36a3c7d8e22fa4d0b2e415b4c3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf2.c
@@ -13,8 +13,8 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vsext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1} } } */
-/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3([^0-9]|$)} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v4,v5} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v6,v7} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v8,v9} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf4.c
index 1a1922abef440d5392da621fdaf072f3930a46a1..023304b6f8ad8467c0107b12062be3fe43f58881 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf4.c
@@ -13,8 +13,8 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vsext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1} } } */
-/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3([^0-9]|$)} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v4,v5} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v6,v7} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v8,v9} } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf8.c
index 49b56468cc987c570a9be0b3322f089a46ca0dd9..4db324051ab54b973b7fc870ead1d2d731ccf32f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vsext_vf2-i8-mf8.c
@@ -13,8 +13,8 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vsext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1} } } */
-/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v0,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vsext\.vf2\s+v2,v3([^0-9]|$)} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v4,v5} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v6,v7} } } */
 /* { dg-final { scan-assembler-not {vsext\.vf2\s+v8,v9} } } */