--- /dev/null
+From c2f7d08cccf4af2ce6992feaabb9e68e4ae0bff3 Mon Sep 17 00:00:00 2001
+From: Andrei Vagin <avagin@gmail.com>
+Date: Thu, 15 Oct 2020 09:00:19 -0700
+Subject: futex: Adjust absolute futex timeouts with per time namespace offset
+
+From: Andrei Vagin <avagin@gmail.com>
+
+commit c2f7d08cccf4af2ce6992feaabb9e68e4ae0bff3 upstream.
+
+For all commands except FUTEX_WAIT, the timeout is interpreted as an
+absolute value. This absolute value is inside the task's time namespace and
+has to be converted to the host's time.
+
+Fixes: 5a590f35add9 ("posix-clocks: Wire up clock_gettime() with timens offsets")
+Reported-by: Hans van der Laan <j.h.vanderlaan@student.utwente.nl>
+Signed-off-by: Andrei Vagin <avagin@gmail.com>
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Reviewed-by: Dmitry Safonov <0x7f454c46@gmail.com>
+Cc: <stable@vger.kernel.org>
+Link: https://lore.kernel.org/r/20201015160020.293748-1-avagin@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ kernel/futex.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/kernel/futex.c
++++ b/kernel/futex.c
+@@ -39,6 +39,7 @@
+ #include <linux/freezer.h>
+ #include <linux/memblock.h>
+ #include <linux/fault-inject.h>
++#include <linux/time_namespace.h>
+
+ #include <asm/futex.h>
+
+@@ -3799,6 +3800,8 @@ SYSCALL_DEFINE6(futex, u32 __user *, uad
+ t = timespec64_to_ktime(ts);
+ if (cmd == FUTEX_WAIT)
+ t = ktime_add_safe(ktime_get(), t);
++ else if (!(op & FUTEX_CLOCK_REALTIME))
++ t = timens_ktime_to_host(CLOCK_MONOTONIC, t);
+ tp = &t;
+ }
+ /*
+@@ -3991,6 +3994,8 @@ SYSCALL_DEFINE6(futex_time32, u32 __user
+ t = timespec64_to_ktime(ts);
+ if (cmd == FUTEX_WAIT)
+ t = ktime_add_safe(ktime_get(), t);
++ else if (!(op & FUTEX_CLOCK_REALTIME))
++ t = timens_ktime_to_host(CLOCK_MONOTONIC, t);
+ tp = &t;
+ }
+ if (cmd == FUTEX_REQUEUE || cmd == FUTEX_CMP_REQUEUE ||
--- /dev/null
+From 4da1edcf8f226d53c02c6b0e3077d581115b30d0 Mon Sep 17 00:00:00 2001
+From: Alex Dewar <alex.dewar90@gmail.com>
+Date: Thu, 20 Aug 2020 18:21:18 +0100
+Subject: memory: brcmstb_dpfe: Fix memory leak
+
+From: Alex Dewar <alex.dewar90@gmail.com>
+
+commit 4da1edcf8f226d53c02c6b0e3077d581115b30d0 upstream.
+
+In brcmstb_dpfe_download_firmware(), memory is allocated to variable fw by
+firmware_request_nowarn(), but never released. Fix up to release fw on
+all return paths.
+
+Cc: <stable@vger.kernel.org>
+Fixes: 2f330caff577 ("memory: brcmstb: Add driver for DPFE")
+Signed-off-by: Alex Dewar <alex.dewar90@gmail.com>
+Acked-by: Markus Mayer <mmayer@broadcom.com>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Link: https://lore.kernel.org/r/20200820172118.781324-1-alex.dewar90@gmail.com
+Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/memory/brcmstb_dpfe.c | 16 ++++++++++------
+ 1 file changed, 10 insertions(+), 6 deletions(-)
+
+--- a/drivers/memory/brcmstb_dpfe.c
++++ b/drivers/memory/brcmstb_dpfe.c
+@@ -656,8 +656,10 @@ static int brcmstb_dpfe_download_firmwar
+ return (ret == -ENOENT) ? -EPROBE_DEFER : ret;
+
+ ret = __verify_firmware(&init, fw);
+- if (ret)
+- return -EFAULT;
++ if (ret) {
++ ret = -EFAULT;
++ goto release_fw;
++ }
+
+ __disable_dcpu(priv);
+
+@@ -676,18 +678,20 @@ static int brcmstb_dpfe_download_firmwar
+
+ ret = __write_firmware(priv->dmem, dmem, dmem_size, is_big_endian);
+ if (ret)
+- return ret;
++ goto release_fw;
+ ret = __write_firmware(priv->imem, imem, imem_size, is_big_endian);
+ if (ret)
+- return ret;
++ goto release_fw;
+
+ ret = __verify_fw_checksum(&init, priv, header, init.chksum);
+ if (ret)
+- return ret;
++ goto release_fw;
+
+ __enable_dcpu(priv);
+
+- return 0;
++release_fw:
++ release_firmware(fw);
++ return ret;
+ }
+
+ static ssize_t generic_show(unsigned int command, u32 response[],
--- /dev/null
+From ea90f66f2a8629dde07328df0b8314aae5e54a47 Mon Sep 17 00:00:00 2001
+From: Thierry Reding <treding@nvidia.com>
+Date: Tue, 1 Sep 2020 17:32:48 +0200
+Subject: memory: tegra: Remove GPU from DRM IOMMU group
+
+From: Thierry Reding <treding@nvidia.com>
+
+commit ea90f66f2a8629dde07328df0b8314aae5e54a47 upstream.
+
+Commit 63a613fdb16c ("memory: tegra: Add gr2d and gr3d to DRM IOMMU
+group") added the GPU to the DRM IOMMU group, which doesn't make any
+sense. This causes problems when Nouveau tries to attach to the SMMU
+and causes it to fall back to using the DMA API.
+
+Remove the GPU from the DRM groups to restore the old behaviour. The
+GPU should always have its own IOMMU domain to make sure it can map
+buffers into contiguous chunks (for big page support) without getting
+in the way of mappings from the DRM group.
+
+Cc: <stable@vger.kernel.org>
+Fixes: 63a613fdb16c ("memory: tegra: Add gr2d and gr3d to DRM IOMMU group")
+Reported-by: Matias Zuniga <matias.nicolas.zc@gmail.com>
+Signed-off-by: Thierry Reding <treding@nvidia.com>
+Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
+Link: https://lore.kernel.org/r/20200901153248.1831263-1-thierry.reding@gmail.com
+Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/memory/tegra/tegra124.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/memory/tegra/tegra124.c
++++ b/drivers/memory/tegra/tegra124.c
+@@ -957,7 +957,6 @@ static const struct tegra_smmu_swgroup t
+ static const unsigned int tegra124_group_drm[] = {
+ TEGRA_SWGROUP_DC,
+ TEGRA_SWGROUP_DCB,
+- TEGRA_SWGROUP_GPU,
+ TEGRA_SWGROUP_VIC,
+ };
+
--- /dev/null
+From 011fde48394b7dc8dfd6660d1013b26a00157b80 Mon Sep 17 00:00:00 2001
+From: Yangbo Lu <yangbo.lu@nxp.com>
+Date: Tue, 20 Oct 2020 16:11:16 +0800
+Subject: mmc: sdhci-of-esdhc: make sure delay chain locked for HS400
+
+From: Yangbo Lu <yangbo.lu@nxp.com>
+
+commit 011fde48394b7dc8dfd6660d1013b26a00157b80 upstream.
+
+For eMMC HS400 mode initialization, the DLL reset is a required step
+if DLL is enabled to use previously, like in bootloader.
+This step has not been documented in reference manual, but the RM will
+be fixed sooner or later.
+
+This patch is to add the step of DLL reset, and make sure delay chain
+locked for HS400.
+
+Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+Acked-by: Adrian Hunter <adrian.hunter@intel.com>
+Link: https://lore.kernel.org/r/20201020081116.20918-1-yangbo.lu@nxp.com
+Fixes: 54e08d9a95ca ("mmc: sdhci-of-esdhc: add hs400 mode support")
+Cc: stable@vger.kernel.org
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-esdhc.h | 2 ++
+ drivers/mmc/host/sdhci-of-esdhc.c | 17 +++++++++++++++++
+ 2 files changed, 19 insertions(+)
+
+--- a/drivers/mmc/host/sdhci-esdhc.h
++++ b/drivers/mmc/host/sdhci-esdhc.h
+@@ -5,6 +5,7 @@
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2009 MontaVista Software, Inc.
+ * Copyright (c) 2010 Pengutronix e.K.
++ * Copyright 2020 NXP
+ * Author: Wolfram Sang <kernel@pengutronix.de>
+ */
+
+@@ -88,6 +89,7 @@
+ /* DLL Config 0 Register */
+ #define ESDHC_DLLCFG0 0x160
+ #define ESDHC_DLL_ENABLE 0x80000000
++#define ESDHC_DLL_RESET 0x40000000
+ #define ESDHC_DLL_FREQ_SEL 0x08000000
+
+ /* DLL Config 1 Register */
+--- a/drivers/mmc/host/sdhci-of-esdhc.c
++++ b/drivers/mmc/host/sdhci-of-esdhc.c
+@@ -4,6 +4,7 @@
+ *
+ * Copyright (c) 2007, 2010, 2012 Freescale Semiconductor, Inc.
+ * Copyright (c) 2009 MontaVista Software, Inc.
++ * Copyright 2020 NXP
+ *
+ * Authors: Xiaobo Xie <X.Xie@freescale.com>
+ * Anton Vorontsov <avorontsov@ru.mvista.com>
+@@ -19,6 +20,7 @@
+ #include <linux/clk.h>
+ #include <linux/ktime.h>
+ #include <linux/dma-mapping.h>
++#include <linux/iopoll.h>
+ #include <linux/mmc/host.h>
+ #include <linux/mmc/mmc.h>
+ #include "sdhci-pltfm.h"
+@@ -743,6 +745,21 @@ static void esdhc_of_set_clock(struct sd
+ if (host->mmc->actual_clock == MMC_HS200_MAX_DTR)
+ temp |= ESDHC_DLL_FREQ_SEL;
+ sdhci_writel(host, temp, ESDHC_DLLCFG0);
++
++ temp |= ESDHC_DLL_RESET;
++ sdhci_writel(host, temp, ESDHC_DLLCFG0);
++ udelay(1);
++ temp &= ~ESDHC_DLL_RESET;
++ sdhci_writel(host, temp, ESDHC_DLLCFG0);
++
++ /* Wait max 20 ms */
++ if (read_poll_timeout(sdhci_readl, temp,
++ temp & ESDHC_DLL_STS_SLV_LOCK,
++ 10, 20000, false,
++ host, ESDHC_DLLSTAT0))
++ pr_err("%s: timeout for delay chain lock.\n",
++ mmc_hostname(host->mmc));
++
+ temp = sdhci_readl(host, ESDHC_TBCTL);
+ sdhci_writel(host, temp | ESDHC_HS400_WNDW_ADJUST, ESDHC_TBCTL);
+
--- /dev/null
+From 0add6e9b88d0632a25323aaf4987dbacb0e4ae64 Mon Sep 17 00:00:00 2001
+From: Michael Walle <michael@walle.cc>
+Date: Fri, 23 Oct 2020 00:23:37 +0200
+Subject: mmc: sdhci-of-esdhc: set timeout to max before tuning
+
+From: Michael Walle <michael@walle.cc>
+
+commit 0add6e9b88d0632a25323aaf4987dbacb0e4ae64 upstream.
+
+On rare occations there is the following error:
+
+ mmc0: Tuning timeout, falling back to fixed sampling clock
+
+There are SD cards which takes a significant longer time to reply to the
+first CMD19 command. The eSDHC takes the data timeout value into account
+during the tuning period. The SDHCI core doesn't explicitly set this
+timeout for the tuning procedure. Thus on the slow cards, there might be
+a spurious "Buffer Read Ready" interrupt, which in turn triggers a wrong
+sequence of events. In the end this will lead to an unsuccessful tuning
+procedure and to the above error.
+
+To workaround this, set the timeout to the maximum value (which is the
+best we can do) and the SDHCI core will take care of the proper timeout
+handling.
+
+Fixes: ba49cbd0936e ("mmc: sdhci-of-esdhc: add tuning support")
+Signed-off-by: Michael Walle <michael@walle.cc>
+Acked-by: Adrian Hunter <adrian.hunter@intel.com>
+Cc: stable@vger.kernel.org
+Link: https://lore.kernel.org/r/20201022222337.19857-1-michael@walle.cc
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-of-esdhc.c | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+--- a/drivers/mmc/host/sdhci-of-esdhc.c
++++ b/drivers/mmc/host/sdhci-of-esdhc.c
+@@ -1069,6 +1069,17 @@ static int esdhc_execute_tuning(struct m
+
+ esdhc_tuning_block_enable(host, true);
+
++ /*
++ * The eSDHC controller takes the data timeout value into account
++ * during tuning. If the SD card is too slow sending the response, the
++ * timer will expire and a "Buffer Read Ready" interrupt without data
++ * is triggered. This leads to tuning errors.
++ *
++ * Just set the timeout to the maximum value because the core will
++ * already take care of it in sdhci_send_tuning().
++ */
++ sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
++
+ hs400_tuning = host->flags & SDHCI_HS400_TUNING;
+
+ do {
--- /dev/null
+From b3e1ea16fb39fb6e1a1cf1dbdd6738531de3dc7d Mon Sep 17 00:00:00 2001
+From: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
+Date: Thu, 15 Oct 2020 17:41:15 +0800
+Subject: mmc: sdhci: Use Auto CMD Auto Select only when v4_mode is true
+
+From: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
+
+commit b3e1ea16fb39fb6e1a1cf1dbdd6738531de3dc7d upstream.
+
+sdhci-of-dwcmshc meets an eMMC read performance regression with below
+command after commit 427b6514d095 ("mmc: sdhci: Add Auto CMD Auto
+Select support"):
+
+dd if=/dev/mmcblk0 of=/dev/null bs=8192 count=100000
+
+Before the commit, the above command gives 120MB/s
+After the commit, the above command gives 51.3 MB/s
+
+So it looks like sdhci-of-dwcmshc expects Version 4 Mode for Auto
+CMD Auto Select. Fix the performance degradation by ensuring v4_mode
+is true to use Auto CMD Auto Select.
+
+Fixes: 427b6514d095 ("mmc: sdhci: Add Auto CMD Auto Select support")
+Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
+Acked-by: Adrian Hunter <adrian.hunter@intel.com>
+Cc: stable@vger.kernel.org
+Link: https://lore.kernel.org/r/20201015174115.4cf2c19a@xhacker.debian
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/mmc/host/sdhci.c
++++ b/drivers/mmc/host/sdhci.c
+@@ -1384,9 +1384,11 @@ static inline void sdhci_auto_cmd_select
+ /*
+ * In case of Version 4.10 or later, use of 'Auto CMD Auto
+ * Select' is recommended rather than use of 'Auto CMD12
+- * Enable' or 'Auto CMD23 Enable'.
++ * Enable' or 'Auto CMD23 Enable'. We require Version 4 Mode
++ * here because some controllers (e.g sdhci-of-dwmshc) expect it.
+ */
+- if (host->version >= SDHCI_SPEC_410 && (use_cmd12 || use_cmd23)) {
++ if (host->version >= SDHCI_SPEC_410 && host->v4_mode &&
++ (use_cmd12 || use_cmd23)) {
+ *mode |= SDHCI_TRNS_AUTO_SEL;
+
+ ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
ext4-fix-bs-ps-issue-reported-with-dioread_nolock-mount-opt.patch
ext4-do-not-use-extent-after-put_bh.patch
drm-ttm-fix-eviction-valuable-range-check.patch
+mmc-sdhci-of-esdhc-make-sure-delay-chain-locked-for-hs400.patch
+mmc-sdhci-of-esdhc-set-timeout-to-max-before-tuning.patch
+mmc-sdhci-use-auto-cmd-auto-select-only-when-v4_mode-is-true.patch
+memory-tegra-remove-gpu-from-drm-iommu-group.patch
+memory-brcmstb_dpfe-fix-memory-leak.patch
+futex-adjust-absolute-futex-timeouts-with-per-time-namespace-offset.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
