ARM: imx31: Fix IIM mapping leak in revision check

mx31_read_cpu_rev() maps the IIM registers with of_iomap() to read the
silicon revision, but returns without unmapping the MMIO mapping.

Keep the normalized revision value in a local variable and route the
return path through iounmap() after the revision register has been read.

Fixes: 3172225d45bd ("ARM: imx31: Retrieve the IIM base address from devicetree")
Signed-off-by: Yuho Choi <dbgh9129@gmail.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>

diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c
index 35c544924e509593759a1f59abca62173bea1c1b..e81ef9e36a1fab4c54711deb98b7b5f257576dbf 100644 (file)
--- a/arch/arm/mach-imx/cpu-imx31.c
+++ b/arch/arm/mach-imx/cpu-imx31.c
@@ -36,6 +36,7 @@ static int mx31_read_cpu_rev(void)
        void __iomem *iim_base;
        struct device_node *np;
        u32 i, srev;
+       int rev = IMX_CHIP_REVISION_UNKNOWN;
 
        np = of_find_compatible_node(NULL, NULL, "fsl,imx31-iim");
        iim_base = of_iomap(np, 0);
@@ -48,13 +49,17 @@ static int mx31_read_cpu_rev(void)
 
        for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
                if (srev == mx31_cpu_type[i].srev) {
+                       rev = mx31_cpu_type[i].rev;
                        imx_print_silicon_rev(mx31_cpu_type[i].name,
                                                mx31_cpu_type[i].rev);
-                       return mx31_cpu_type[i].rev;
+                       goto out;
                }
 
        imx_print_silicon_rev("i.MX31", IMX_CHIP_REVISION_UNKNOWN);
-       return IMX_CHIP_REVISION_UNKNOWN;
+
+out:
+       iounmap(iim_base);
+       return rev;
 }
 
 int mx31_revision(void)