clk: meson: clk-pll: propagate the error from meson_clk_pll_set_rate()

Popagate the error code from meson_clk_pll_set_rate() when the PLL does
not lock with the new settings.

Fixes: 722825dcd54b2e ("clk: meson: migrate plls clocks to clk_regmap")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201226121556.975418-4-martin.blumenstingl@googlemail.com

diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
index 5b932976483fd118331e67378bc3cd616575487f..49f27fe532139c7aa6f70b11f4a87046fc3dee0e 100644 (file)
--- a/drivers/clk/meson/clk-pll.c
+++ b/drivers/clk/meson/clk-pll.c
@@ -394,7 +394,8 @@ static int meson_clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
        if (!enabled)
                return 0;
 
-       if (meson_clk_pll_enable(hw)) {
+       ret = meson_clk_pll_enable(hw);
+       if (ret) {
                pr_warn("%s: pll did not lock, trying to restore old rate %lu\n",
                        __func__, old_rate);
                /*
@@ -406,7 +407,7 @@ static int meson_clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
                meson_clk_pll_set_rate(hw, old_rate, parent_rate);
        }
 
-       return 0;
+       return ret;
 }
 
 /*