]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
hw/misc/mps2-scc.c: fix scc_partno field width
authorSimon Xu <simonxhy0404@gmail.com>
Fri, 24 Jul 2026 16:09:43 +0000 (11:09 -0500)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 28 Jul 2026 10:36:49 +0000 (11:36 +0100)
Increase the extract32 length from 8 to 12. The Primary part number is
defined as bits[15:4] by the "SSE-310 with M85 and U55 FPGA"
documentation. For example for the mps3-an547, 0x547 is 12 bits but we
only return 8 bits right now.

Signed-off-by: Simon Xu <simonxhy0404@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20260724160943.52509-3-simonxhy0404@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/misc/mps2-scc.c

index 1ecb2879e3239771ed7871f2d66bd2b1c587733a..554b504c72030bd6b88a8e436fcf9329caeaf198 100644 (file)
@@ -57,7 +57,7 @@ REG32(ID, 0xFFC)
 static int scc_partno(MPS2SCC *s)
 {
     /* Return the partno field of the SCC_ID (0x524, 0x511, etc) */
-    return extract32(s->id, 4, 8);
+    return extract32(s->id, 4, 12);
 }
 
 /* Is CFG_REG2 present? */