mc->mc_gregs[VKI_PT_ORIG_R3] = tst->arch.vex.guest_GPR3;
mc->mc_gregs[VKI_PT_CTR] = tst->arch.vex.guest_CTR;
mc->mc_gregs[VKI_PT_LNK] = tst->arch.vex.guest_LR;
- mc->mc_gregs[VKI_PT_XER] = tst->arch.vex.guest_XER;
- mc->mc_gregs[VKI_PT_CCR] = LibVEX_GuestPPC32_get_cr(&tst->arch.vex);
+ mc->mc_gregs[VKI_PT_XER] = LibVEX_GuestPPC32_get_XER(&tst->arch.vex);
+ mc->mc_gregs[VKI_PT_CCR] = LibVEX_GuestPPC32_get_CR(&tst->arch.vex);
mc->mc_gregs[VKI_PT_MQ] = 0;
mc->mc_gregs[VKI_PT_TRAP] = 0;
mc->mc_gregs[VKI_PT_DAR] = fault_addr;
// Umm ... ? (jrs 2005 July 8)
// tst->arch.m_orig_gpr3 = mc->mc_gregs[VKI_PT_ORIG_R3];
- //tst->arch.m_cr = mc->mc_gregs[VKI_PT_CCR];
- LibVEX_GuestPPC32_put_cr( mc->mc_gregs[VKI_PT_CCR], &tst->arch.vex );
+ LibVEX_GuestPPC32_put_CR( mc->mc_gregs[VKI_PT_CCR], &tst->arch.vex );
tst->arch.vex.guest_LR = mc->mc_gregs[VKI_PT_LNK];
tst->arch.vex.guest_CTR = mc->mc_gregs[VKI_PT_CTR];
- tst->arch.vex.guest_XER = mc->mc_gregs[VKI_PT_XER];
+ LibVEX_GuestPPC32_put_XER( mc->mc_gregs[VKI_PT_XER], &tst->arch.vex );
tst->arch.vex_shadow = priv->shadow;
2: sc /* do the syscall */
/* put the result back in the threadstate */
- /* HACK: killing all of CR0 for simplicity (should get from gst) */
3: stw 3,OFFSET_ppc32_GPR3(30) /* gst->GPR3 = sc result */
- li 4,1
- stw 4,OFFSET_ppc32_CC_OP(30) /* gst->CC_OP = 1 */
+ /* copy cr0.so back to simulated state */
mfcr 5 /* r5 = CR */
- andis. 5,5,0x1000 /* mask to only CR7.SO */
- oris 5,5,0x2000 /* set CR7.EQ */
- stw 5,OFFSET_ppc32_CC_DEP1(30) /* gst->CR7 = CR7 */
+ rlwinm 5,5,4,31,31 /* r5 = (CR >> 28) & 1 */
+ stb 5,OFFSET_ppc32_CR0_0(30) /* gst->CR0.SO = cr0.so */
/* block signals again */
/* set up for sigprocmask(SIG_SETMASK, postmask, NULL) */
#elif defined(VGP_ppc32_linux)
VexGuestPPC32State* gst = (VexGuestPPC32State*)gst_vanilla;
- UInt cr = LibVEX_GuestPPC32_get_cr7( gst );
- UInt err = (cr >> 28) & 1; // CR7.SO
+ UInt cr = LibVEX_GuestPPC32_get_CR( gst );
+ UInt err = (cr >> 28) & 1; // CR0.SO
canonical->what = (err == 1) ? SsFailure : SsSuccess;
canonical->val = (UWord)gst->guest_GPR3;
#elif defined(VGP_ppc32_linux)
VexGuestPPC32State* gst = (VexGuestPPC32State*)gst_vanilla;
+ UInt old_cr = LibVEX_GuestPPC32_get_CR(gst);
+
gst->guest_GPR3 = canonical->val;
- gst->guest_CC_OP = 1;
- /* XXX: Setting all of CR0, not just SO flag */
- if (canonical->what == SsFailure) /* set cr0.SO */
- gst->guest_CC_DEP1 = 0x30000000;
- else /* clear cr0.SO */
- gst->guest_CC_DEP1 = 0x20000000;
-// CAB: Need to set gpr0?
- gst->guest_GPR0 = 0;
+
+ if (canonical->what == SsFailure) {
+ /* set CR0.SO */
+ LibVEX_GuestPPC32_put_CR( old_cr | (1<<28), gst );
+ } else {
+ /* clear CR0.SO */
+ LibVEX_GuestPPC32_put_CR( old_cr & ~(1<<28), gst );
+ }
#else
# error "putSyscallStatusIntoGuestState: unknown arch"
SET_STATUS_from_SysRes(
VG_(mk_SysRes_ppc32_linux)(
tst->arch.vex.guest_GPR3,
- (LibVEX_GuestPPC32_get_cr7( &tst->arch.vex ) >> 28) & 1
+ /* get CR0.SO */
+ (LibVEX_GuestPPC32_get_CR( &tst->arch.vex ) >> 28) & 1
)
);
cheap_AddSub32:
case Iop_Mul32:
+ case Iop_CmpORD32S:
+ case Iop_CmpORD32U:
return mkLeft32(mce, mkUifU32(mce, vatom1,vatom2));
case Iop_Add64:
case Iop_64to32:
case Iop_64HIto32:
case Iop_1Uto32:
+ case Iop_1Sto32:
case Iop_8Uto32:
case Iop_16Uto32:
case Iop_16Sto32:
v64lo = expr2vbits_Load_WRK(mce, end, Ity_I64, addr, bias);
v64hi = expr2vbits_Load_WRK(mce, end, Ity_I64, addr, bias+8);
} else {
- tl_assert(0 /* awaiting test case */);
v64hi = expr2vbits_Load_WRK(mce, end, Ity_I64, addr, bias);
v64lo = expr2vbits_Load_WRK(mce, end, Ity_I64, addr, bias+8);
}