]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
arm64: versal2: Drop static DDR MMU mappings
authorMichal Simek <michal.simek@amd.com>
Thu, 11 Jun 2026 12:10:25 +0000 (14:10 +0200)
committerMichal Simek <michal.simek@amd.com>
Wed, 8 Jul 2026 06:55:51 +0000 (08:55 +0200)
DDR coverage is already populated later from the DRAM banks discovered by
mem_map_fill(). Drop the stale static mappings so the MMU table matches
address map more closely.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/156e48d8228acfeba8866618038b48cd51490ea7.1781179823.git.michal.simek@amd.com
arch/arm/mach-versal2/cpu.c

index f65c231bdab70cd5c858c31c09098682b95b0f39..d66109abd78e1f0e1c3818c59367e553c28129cc 100644 (file)
@@ -19,9 +19,9 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #if CONFIG_IS_ENABLED(PCIE_DW_AMD)
-#define VERSAL2_MEM_MAP_USED   6
+#define VERSAL2_MEM_MAP_USED   4
 #else
-#define VERSAL2_MEM_MAP_USED   5
+#define VERSAL2_MEM_MAP_USED   3
 #endif
 
 #define DRAM_BANKS CONFIG_NR_DRAM_BANKS
@@ -51,19 +51,6 @@ static struct mm_region versal2_mem_map[VERSAL2_MEM_MAP_MAX] = {
                .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
                         PTE_BLOCK_NON_SHARE |
                         PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               .virt = 0x600000000UL,
-               .phys = 0x600000000UL,
-               .size = 0x800000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-                        PTE_BLOCK_INNER_SHARE
-       }, {
-               .virt = 0xe00000000UL,
-               .phys = 0xe00000000UL,
-               .size = 0xf200000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
 #if CONFIG_IS_ENABLED(PCIE_DW_AMD)
        }, {
                /* PCIe DBI (1 MB) and config space (255 MB) are contiguous */