int irq;
} VersalSimplePeriphMap;
+typedef struct VersalMemMap {
+ uint64_t addr;
+ uint64_t size;
+} VersalMemMap;
+
typedef struct VersalGicMap {
int version;
uint64_t dist;
} VersalCpuClusterMap;
typedef struct VersalMap {
+ VersalMemMap ocm;
+
VersalCpuClusterMap apu;
VersalCpuClusterMap rpu;
} VersalMap;
static const VersalMap VERSAL_MAP = {
+ .ocm = {
+ .addr = 0xfffc0000,
+ .size = 0x40000,
+ },
+
.apu = {
.name = "apu",
.cpu_model = ARM_CPU_TYPE_NAME("cortex-a72"),
{
Versal *s = XLNX_VERSAL_BASE(dev);
DeviceState *slcr, *ospi;
+ MemoryRegion *ocm;
Object *container;
const VersalMap *map = versal_get_map(s);
size_t i;
versal_unimp(s);
/* Create the On Chip Memory (OCM). */
- memory_region_init_ram(&s->lpd.mr_ocm, OBJECT(s), "ocm",
- MM_OCM_SIZE, &error_fatal);
-
- memory_region_add_subregion_overlap(&s->mr_ps, MM_OCM, &s->lpd.mr_ocm, 0);
+ ocm = g_new(MemoryRegion, 1);
+ memory_region_init_ram(ocm, OBJECT(s), "ocm", map->ocm.size, &error_fatal);
+ memory_region_add_subregion_overlap(&s->mr_ps, map->ocm.addr, ocm, 0);
}
DeviceState *versal_get_boot_cpu(Versal *s)