riscv: mm: fix SWIOTLB initialization for systems with DRAM above 4GB

On RISC-V platforms where the entire physical memory (DRAM) resides
above the 32-bit address space (i.e., above dma32_phys_limit), the
current SWIOTLB initialization logic fails.

This patch addresses two interconnected issues on such platforms:

1. Incorrect 32-bit DMA bounce assumption:
The existing condition `max_pfn > PFN_DOWN(dma32_phys_limit)` assumes
that a 32-bit DMA bounce buffer is required simply because the maximum
PFN exceeds the 32-bit limit. However, if all DRAM starts above 4GB,
no memory exists below the limit to satisfy this allocation. Fix
this by adding a check to ensure `memblock_start_of_DRAM()` is actually
below the 32-bit limit before enforcing 32-bit SWIOTLB.

2. kmalloc() bounce buffer allocation failure on non-coherent systems:
For non-coherent DMA, kmalloc() buffers whose sizes are not
cache-line-aligned still require bouncing, even if 32-bit DMA bouncing
is skipped. Without the `SWIOTLB_ANY` flag, swiotlb_init() defaults to
allocating from low memory, which fails completely when DRAM only exists
in high memory. By appending `SWIOTLB_ANY` to swiotlb_flags, the allocator
is permitted to allocate this bounce buffer from high memory.

With this patch, systems with non-coherent DMA and DRAM entirely above
4GB can successfully map the software IO TLB in high memory and boot
normally.

Tested-by: Anirudh Srinivasan <asrinivasan@oss.tenstorrent.com>
Signed-off-by: Troy Mitchell <troy.mitchell@linux.dev>
Link: https://patch.msgid.link/20260727-fix-riscv-swiotlb-v3-1-59479b23736c@linux.dev
Reviewed-by: Drew Fustini <fustini@kernel.org>
Signed-off-by: Paul Walmsley <pjw@kernel.org>

diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 3e450890be07e42831ffa24254466352bb0a08b6..395ed9ab578e9cd72ba1cbf9e1e252c292860dd2 100644 (file)
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -164,7 +164,9 @@ static void print_vm_layout(void) { }
 
 void __init arch_mm_preinit(void)
 {
-       bool swiotlb = max_pfn > PFN_DOWN(dma32_phys_limit);
+       bool swiotlb = max_pfn > PFN_DOWN(dma32_phys_limit) &&
+                      memblock_start_of_DRAM() < dma32_phys_limit;
+       unsigned int swiotlb_flags = SWIOTLB_VERBOSE;
 #ifdef CONFIG_FLATMEM
        BUG_ON(!mem_map);
 #endif /* CONFIG_FLATMEM */
@@ -172,17 +174,22 @@ void __init arch_mm_preinit(void)
        if (IS_ENABLED(CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC) && !swiotlb &&
            dma_cache_alignment != 1) {
                /*
-                * If no bouncing needed for ZONE_DMA, allocate 1MB swiotlb
-                * buffer per 1GB of RAM for kmalloc() bouncing on
-                * non-coherent platforms.
+                * No 32-bit DMA bouncing needed (either all DRAM is within
+                * the 32-bit limit, or it all starts above it), but
+                * kmalloc() buffers whose sizes are not cache-line-aligned
+                * still require bouncing for non-coherent DMA.  Use
+                * SWIOTLB_ANY so that the buffer can be allocated from high
+                * memory when DRAM starts above dma32_phys_limit.  Allocate
+                * ~1 MB per 1 GB of RAM.
                 */
                unsigned long size =
                        DIV_ROUND_UP(memblock_phys_mem_size(), 1024);
                swiotlb_adjust_size(min(swiotlb_size_or_default(), size));
                swiotlb = true;
+               swiotlb_flags |= SWIOTLB_ANY;
        }
 
-       swiotlb_init(swiotlb, SWIOTLB_VERBOSE);
+       swiotlb_init(swiotlb, swiotlb_flags);
 
        print_vm_layout();
 }