]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: rockchip: use gated-fixed-clock for pcie-refclk on rk3588-tiger
authorHeiko Stuebner <heiko.stuebner@cherry.de>
Tue, 10 Feb 2026 08:03:00 +0000 (09:03 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 2 Mar 2026 12:50:08 +0000 (13:50 +0100)
Using a combination of fixed clock and gpio-gate clock works but does
not describe the actual hardware. Use the gated-fixed-clock binding
to describe this in a nicer way.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://patch.msgid.link/20260210080303.680403-3-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi

index 27269b7b08aa729f673c0bd317ecd70224a19072..b4b8f305935fbb2260dae778103610db0bb6471a 100644 (file)
                };
        };
 
-       /*
-        * 100MHz reference clock for PCIe peripherals from PI6C557-05BLE
-        * clock generator.
-        * The clock output is gated via the OE pin on the clock generator.
-        * This is modeled as a fixed-clock plus a gpio-gate-clock.
-        */
-       pcie_refclk_gen: pcie-refclk-gen-clock {
-               compatible = "fixed-clock";
+       /* 100MHz PCIe reference clock from PI6C557-05BLE */
+       pcie_refclk: pcie-clock-generator {
+               compatible = "gated-fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <100000000>;
-       };
-
-       pcie_refclk: pcie-refclk-clock {
-               compatible = "gpio-gate-clock";
-               clocks = <&pcie_refclk_gen>;
-               #clock-cells = <0>;
+               clock-output-names = "pcie-refclk-clock";
                enable-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; /* PCIE30X4_CLKREQN_M1_L */
+               vdd-supply = <&vcca_3v3_s0>;
        };
 
        vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {