There is not a problem to work with phy on RTL5.6 that's why remove this
code which fixed problems on previous RTLs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
priv->init++;
}
-#ifdef CONFIG_ARM64
- if (!priv->init) {
-#endif
phy_detection(dev);
/* interface - look at tsec */
clk_rate = ZYNQ_GEM_FREQUENCY_10;
break;
}
-#ifdef CONFIG_ARM64
- }
-#endif
-#ifndef CONFIG_ARM64
/* Change the rclk and clk only not using EMIO interface */
if (!priv->emio)
zynq_slcr_gem_clk_setup(dev->iobase !=
ZYNQ_GEM_BASEADDR0, clk_rate);
-#endif
/* set hardware address because of ... */
if (!is_valid_ether_addr(dev->enetaddr)) {