]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
net: stmmac: dwmac-spacemit: Fix wrong phy interface definition
authorInochi Amaoto <inochiama@gmail.com>
Tue, 23 Jun 2026 07:46:34 +0000 (15:46 +0800)
committerJakub Kicinski <kuba@kernel.org>
Thu, 25 Jun 2026 02:36:12 +0000 (19:36 -0700)
The current MII interface register definition from the vendor is wrong,
use the right number for the macro. Also, correct the interface mask
in spacemit_set_phy_intf_sel() so it can update the register with the
right number

Fixes: 30f0ba420ed3 ("net: stmmac: Add glue layer for Spacemit K3 SoC")
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Link: https://patch.msgid.link/20260623074637.503864-2-inochiama@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c

index 223754cc5c79b76b09e59708e3a3cb6f5cbb2da6..3bfb6d49be6c0c48920fa3dbc2e4f024a0ce7ed6 100644 (file)
 #include "stmmac_platform.h"
 
 /* ctrl register bits */
-#define CTRL_PHY_INTF_RGMII            BIT(3)
-#define CTRL_PHY_INTF_MII              BIT(4)
+#define CTRL_PHY_INTF_MODE             GENMASK(4, 3)
+#define CTRL_PHY_INTF_RMII             FIELD_PREP(CTRL_PHY_INTF_MODE, 0)
+#define CTRL_PHY_INTF_RGMII            FIELD_PREP(CTRL_PHY_INTF_MODE, 1)
+#define CTRL_PHY_INTF_MII              FIELD_PREP(CTRL_PHY_INTF_MODE, 3)
 #define CTRL_WAKE_IRQ_EN               BIT(9)
 #define CTRL_PHY_IRQ_EN                        BIT(12)
 
@@ -118,7 +120,7 @@ static void spacemit_get_interfaces(struct stmmac_priv *priv, void *bsp_priv,
 
 static int spacemit_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel)
 {
-       unsigned int mask = CTRL_PHY_INTF_MII | CTRL_PHY_INTF_RGMII;
+       unsigned int mask = CTRL_PHY_INTF_MODE;
        struct spacmit_dwmac *dwmac = bsp_priv;
        unsigned int val = 0;
 
@@ -128,6 +130,7 @@ static int spacemit_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel)
                break;
 
        case PHY_INTF_SEL_RMII:
+               val = CTRL_PHY_INTF_RMII;
                break;
 
        case PHY_INTF_SEL_RGMII: