]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: imx8mp-evk: Enable pull select bit for PCIe regulator GPIO (M.2 W_DISABLE1)
authorSherry Sun <sherry.sun@nxp.com>
Thu, 5 Feb 2026 07:34:53 +0000 (15:34 +0800)
committerFrank Li <Frank.Li@nxp.com>
Mon, 2 Mar 2026 16:16:11 +0000 (11:16 -0500)
The current pin configuration for MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06
sets the weak pull-up but does not enable the pull select field.
Bit 8 in the IOMUX register must be set in order for the weak pull-up
to actually take effect.

Update the pinctrl setting from 0x40 to 0x140 to enable both the pull
select and the weak pull-up, ensuring the line behaves as expected.

Fixes: d50650500064 ("arm64: dts: imx8mp-evk: Add PCIe support")
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
arch/arm64/boot/dts/freescale/imx8mp-evk.dts

index 33e7094d0e10d7dca26f5078e032c05a69f3f581..70897289680c7482b7898363fc54db507451146c 100644 (file)
 
        pinctrl_pcie0_reg: pcie0reggrp {
                fsl,pins = <
-                       MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06      0x40
+                       MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06      0x140
                >;
        };