drm/sun4i: mixer: split out layer config

Later special plane only driver for DE33 will provide separate
configuration. This change will also help layer driver migrate away from
mixer structure.

Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
Tested-by: Ryan Walklin <ryan@testtoast.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20251104180942.61538-28-jernej.skrabec@gmail.com
Signed-off-by: Chen-Yu Tsai <wens@kernel.org>

diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c
index c371e94b95bdf3e1588d4009ca40324000e38ab5..30779db2f9b2a2c95235fc1e6f7126592143a8b0 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun8i_csc.c
+++ b/drivers/gpu/drm/sun4i/sun8i_csc.c
@@ -240,7 +240,7 @@ void sun8i_csc_config(struct sun8i_layer *layer,
                return;
        }
 
-       base = ccsc_base[layer->mixer->cfg->ccsc][layer->channel];
+       base = ccsc_base[layer->mixer->cfg->lay_cfg.ccsc][layer->channel];
 
        sun8i_csc_setup(layer->regs, base,
                        mode, state->color_encoding,

diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index 446af7026259ac5e33359af55b0d786d330e599d..b515204c815ee9ee43c7dcb2563f5a67ac0a854b 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -704,137 +704,173 @@ static void sun8i_mixer_remove(struct platform_device *pdev)
 }
 
 static const struct sun8i_mixer_cfg sun8i_a83t_mixer0_cfg = {
-       .ccsc           = CCSC_MIXER0_LAYOUT,
+       .lay_cfg = {
+               .ccsc           = CCSC_MIXER0_LAYOUT,
+               .de_type        = SUN8I_MIXER_DE2,
+               .vi_scaler_num  = 1,
+               .scaler_mask    = 0xf,
+               .scanline_yuv   = 2048,
+               .de2_fcc_alpha  = 1,
+       },
        .de_type        = SUN8I_MIXER_DE2,
-       .vi_scaler_num  = 1,
-       .scaler_mask    = 0xf,
-       .scanline_yuv   = 2048,
-       .de2_fcc_alpha  = 1,
        .ui_num         = 3,
        .vi_num         = 1,
 };
 
 static const struct sun8i_mixer_cfg sun8i_a83t_mixer1_cfg = {
-       .ccsc           = CCSC_MIXER1_LAYOUT,
+       .lay_cfg = {
+               .ccsc           = CCSC_MIXER1_LAYOUT,
+               .de_type        = SUN8I_MIXER_DE2,
+               .vi_scaler_num  = 1,
+               .scaler_mask    = 0x3,
+               .scanline_yuv   = 2048,
+               .de2_fcc_alpha  = 1,
+       },
        .de_type        = SUN8I_MIXER_DE2,
-       .vi_scaler_num  = 1,
-       .scaler_mask    = 0x3,
-       .scanline_yuv   = 2048,
-       .de2_fcc_alpha  = 1,
        .ui_num         = 1,
        .vi_num         = 1,
 };
 
 static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = {
-       .ccsc           = CCSC_MIXER0_LAYOUT,
+       .lay_cfg = {
+               .ccsc           = CCSC_MIXER0_LAYOUT,
+               .de_type        = SUN8I_MIXER_DE2,
+               .vi_scaler_num  = 1,
+               .scaler_mask    = 0xf,
+               .scanline_yuv   = 2048,
+               .de2_fcc_alpha  = 1,
+       },
        .de_type        = SUN8I_MIXER_DE2,
        .mod_rate       = 432000000,
-       .vi_scaler_num  = 1,
-       .scaler_mask    = 0xf,
-       .scanline_yuv   = 2048,
-       .de2_fcc_alpha  = 1,
        .ui_num         = 3,
        .vi_num         = 1,
 };
 
 static const struct sun8i_mixer_cfg sun8i_r40_mixer0_cfg = {
-       .ccsc           = CCSC_MIXER0_LAYOUT,
+       .lay_cfg = {
+               .ccsc           = CCSC_MIXER0_LAYOUT,
+               .de_type        = SUN8I_MIXER_DE2,
+               .vi_scaler_num  = 1,
+               .scaler_mask    = 0xf,
+               .scanline_yuv   = 2048,
+               .de2_fcc_alpha  = 1,
+       },
        .de_type        = SUN8I_MIXER_DE2,
        .mod_rate       = 297000000,
-       .vi_scaler_num  = 1,
-       .scaler_mask    = 0xf,
-       .scanline_yuv   = 2048,
-       .de2_fcc_alpha  = 1,
        .ui_num         = 3,
        .vi_num         = 1,
 };
 
 static const struct sun8i_mixer_cfg sun8i_r40_mixer1_cfg = {
-       .ccsc           = CCSC_MIXER1_LAYOUT,
+       .lay_cfg = {
+               .ccsc           = CCSC_MIXER1_LAYOUT,
+               .de_type        = SUN8I_MIXER_DE2,
+               .vi_scaler_num  = 1,
+               .scaler_mask    = 0x3,
+               .scanline_yuv   = 2048,
+               .de2_fcc_alpha  = 1,
+       },
        .de_type        = SUN8I_MIXER_DE2,
        .mod_rate       = 297000000,
-       .vi_scaler_num  = 1,
-       .scaler_mask    = 0x3,
-       .scanline_yuv   = 2048,
-       .de2_fcc_alpha  = 1,
        .ui_num         = 1,
        .vi_num         = 1,
 };
 
 static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
-       .de_type = SUN8I_MIXER_DE2,
-       .vi_num = 2,
-       .ui_num = 1,
-       .vi_scaler_num  = 2,
-       .scaler_mask = 0x3,
-       .scanline_yuv = 2048,
-       .ccsc = CCSC_MIXER0_LAYOUT,
-       .mod_rate = 150000000,
+       .lay_cfg = {
+               .ccsc           = CCSC_MIXER0_LAYOUT,
+               .de_type        = SUN8I_MIXER_DE2,
+               .vi_scaler_num  = 2,
+               .scaler_mask    = 0x3,
+               .scanline_yuv   = 2048,
+       },
+       .de_type        = SUN8I_MIXER_DE2,
+       .mod_rate       = 150000000,
+       .vi_num         = 2,
+       .ui_num         = 1,
 };
 
 static const struct sun8i_mixer_cfg sun20i_d1_mixer0_cfg = {
-       .ccsc           = CCSC_D1_MIXER0_LAYOUT,
+       .lay_cfg = {
+               .ccsc           = CCSC_D1_MIXER0_LAYOUT,
+               .de_type        = SUN8I_MIXER_DE2,
+               .vi_scaler_num  = 1,
+               .scaler_mask    = 0x3,
+               .scanline_yuv   = 2048,
+               .de2_fcc_alpha  = 1,
+       },
        .de_type        = SUN8I_MIXER_DE2,
        .mod_rate       = 297000000,
-       .vi_scaler_num  = 1,
-       .scaler_mask    = 0x3,
-       .scanline_yuv   = 2048,
-       .de2_fcc_alpha  = 1,
        .ui_num         = 1,
        .vi_num         = 1,
 };
 
 static const struct sun8i_mixer_cfg sun20i_d1_mixer1_cfg = {
-       .ccsc           = CCSC_MIXER1_LAYOUT,
+       .lay_cfg = {
+               .ccsc           = CCSC_MIXER1_LAYOUT,
+               .de_type        = SUN8I_MIXER_DE2,
+               .vi_scaler_num  = 1,
+               .scaler_mask    = 0x1,
+               .scanline_yuv   = 1024,
+               .de2_fcc_alpha  = 1,
+       },
        .de_type        = SUN8I_MIXER_DE2,
        .mod_rate       = 297000000,
-       .vi_scaler_num  = 1,
-       .scaler_mask    = 0x1,
-       .scanline_yuv   = 1024,
-       .de2_fcc_alpha  = 1,
        .ui_num         = 0,
        .vi_num         = 1,
 };
 
 static const struct sun8i_mixer_cfg sun50i_a64_mixer0_cfg = {
-       .ccsc           = CCSC_MIXER0_LAYOUT,
+       .lay_cfg = {
+               .ccsc           = CCSC_MIXER0_LAYOUT,
+               .de_type        = SUN8I_MIXER_DE2,
+               .vi_scaler_num  = 1,
+               .scaler_mask    = 0xf,
+               .scanline_yuv   = 4096,
+               .de2_fcc_alpha  = 1,
+       },
        .de_type        = SUN8I_MIXER_DE2,
        .mod_rate       = 297000000,
-       .vi_scaler_num  = 1,
-       .scaler_mask    = 0xf,
-       .scanline_yuv   = 4096,
-       .de2_fcc_alpha  = 1,
        .ui_num         = 3,
        .vi_num         = 1,
 };
 
 static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = {
-       .ccsc           = CCSC_MIXER1_LAYOUT,
+       .lay_cfg = {
+               .ccsc           = CCSC_MIXER1_LAYOUT,
+               .de_type        = SUN8I_MIXER_DE2,
+               .vi_scaler_num  = 1,
+               .scaler_mask    = 0x3,
+               .scanline_yuv   = 2048,
+               .de2_fcc_alpha  = 1,
+       },
        .de_type        = SUN8I_MIXER_DE2,
        .mod_rate       = 297000000,
-       .vi_scaler_num  = 1,
-       .scaler_mask    = 0x3,
-       .scanline_yuv   = 2048,
-       .de2_fcc_alpha  = 1,
        .ui_num         = 1,
        .vi_num         = 1,
 };
 
 static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = {
+       .lay_cfg = {
+               .de_type        = SUN8I_MIXER_DE3,
+               .vi_scaler_num  = 1,
+               .scaler_mask    = 0xf,
+               .scanline_yuv   = 4096,
+       },
        .de_type        = SUN8I_MIXER_DE3,
        .mod_rate       = 600000000,
-       .vi_scaler_num  = 1,
-       .scaler_mask    = 0xf,
-       .scanline_yuv   = 4096,
        .ui_num         = 3,
        .vi_num         = 1,
 };
 
 static const struct sun8i_mixer_cfg sun50i_h616_mixer0_cfg = {
+       .lay_cfg = {
+               .de_type        = SUN8I_MIXER_DE33,
+               .scaler_mask    = 0xf,
+               .scanline_yuv   = 4096,
+       },
        .de_type        = SUN8I_MIXER_DE33,
        .mod_rate       = 600000000,
-       .scaler_mask    = 0xf,
-       .scanline_yuv   = 4096,
        .ui_num         = 3,
        .vi_num         = 1,
        .map            = {0, 6, 7, 8},

diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
index 8c2e8005fc5bdd210933c0fc4f0105a603d8bd45..5b6068755ad1a811fd20d8e9fa8961a7b6d26f29 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
@@ -164,34 +164,45 @@ enum sun8i_mixer_type {
 };
 
 /**
- * struct sun8i_mixer_cfg - mixer HW configuration
- * @vi_num: number of VI channels
- * @ui_num: number of UI channels
+ * struct sun8i_layer_cfg - layer configuration
  * @vi_scaler_num: Number of VI scalers. Used on DE2 and DE3.
  * @scaler_mask: bitmask which tells which channel supports scaling
  *     First, scaler supports for VI channels is defined and after that, scaler
  *     support for UI channels. For example, if mixer has 2 VI channels without
  *     scaler and 2 UI channels with scaler, bitmask would be 0xC.
  * @ccsc: select set of CCSC base addresses from the enumeration above.
- * @mod_rate: module clock rate that needs to be set in order to have
- *     a functional block.
  * @de_type: sun8i_mixer_type enum representing the display engine generation.
  * @scaline_yuv: size of a scanline for VI scaler for YUV formats.
  * @de2_fcc_alpha: use FCC for missing DE2 VI alpha capability
  *     Most DE2 cores has FCC. If number of VI planes is one, enable this.
- * @map: channel map for DE variants processing YUV separately (DE33)
  */
-struct sun8i_mixer_cfg {
-       int             vi_num;
-       int             ui_num;
+struct sun8i_layer_cfg {
        unsigned int    vi_scaler_num;
        int             scaler_mask;
        int             ccsc;
-       unsigned long   mod_rate;
        unsigned int    de_type;
        unsigned int    scanline_yuv;
        unsigned int    de2_fcc_alpha : 1;
-       unsigned int    map[6];
+};
+
+/**
+ * struct sun8i_mixer_cfg - mixer HW configuration
+ * @lay_cfg: layer configuration
+ * @vi_num: number of VI channels
+ * @ui_num: number of UI channels
+ * @de_type: sun8i_mixer_type enum representing the display engine generation.
+ * @mod_rate: module clock rate that needs to be set in order to have
+ *     a functional block.
+ * @map: channel map for DE variants processing YUV separately (DE33)
+ */
+
+struct sun8i_mixer_cfg {
+       struct sun8i_layer_cfg  lay_cfg;
+       int                     vi_num;
+       int                     ui_num;
+       unsigned int            de_type;
+       unsigned long           mod_rate;
+       unsigned int            map[6];
 };
 
 struct sun8i_mixer {

diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
index 2bbd00f595f7038f0eb4ef1e616f116b9098529c..cd19e40aefdc1f156dd6c3b31e8b122c4d541d7a 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
@@ -190,7 +190,7 @@ static int sun8i_ui_layer_atomic_check(struct drm_plane *plane,
        min_scale = DRM_PLANE_NO_SCALING;
        max_scale = DRM_PLANE_NO_SCALING;
 
-       if (layer->mixer->cfg->scaler_mask & BIT(layer->channel)) {
+       if (layer->mixer->cfg->lay_cfg.scaler_mask & BIT(layer->channel)) {
                min_scale = SUN8I_UI_SCALER_SCALE_MIN;
                max_scale = SUN8I_UI_SCALER_SCALE_MAX;
        }

diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_scaler.c b/drivers/gpu/drm/sun4i/sun8i_ui_scaler.c
index 0ba1482688d703b60ca527b954608f5b149686d6..4d06c366de7faeae3678710740359cdd024eaa1c 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun8i_ui_scaler.c
+++ b/drivers/gpu/drm/sun4i/sun8i_ui_scaler.c
@@ -91,7 +91,7 @@ static const u32 lan2coefftab16[240] = {
 
 static u32 sun8i_ui_scaler_base(struct sun8i_mixer *mixer, int channel)
 {
-       int offset = mixer->cfg->vi_scaler_num;
+       int offset = mixer->cfg->lay_cfg.vi_scaler_num;
 
        if (mixer->cfg->de_type == SUN8I_MIXER_DE3)
                return DE3_VI_SCALER_UNIT_BASE +

diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
index 8e011744066450c9c2c07694c8360f54270676a4..84ca7a37f14c5c2594d114f9f20b07b8315296f1 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
@@ -54,7 +54,7 @@ static void sun8i_vi_layer_update_attributes(struct sun8i_layer *layer,
        regmap_write(layer->regs,
                     SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, layer->overlay), val);
 
-       if (mixer->cfg->de2_fcc_alpha) {
+       if (mixer->cfg->lay_cfg.de2_fcc_alpha) {
                regmap_write(layer->regs,
                             SUN8I_MIXER_FCC_GLOBAL_ALPHA_REG,
                             SUN8I_MIXER_FCC_GLOBAL_ALPHA(state->alpha >> 8));
@@ -153,7 +153,7 @@ static void sun8i_vi_layer_update_coord(struct sun8i_layer *layer,
                }
 
                /* it seems that every RGB scaler has buffer for 2048 pixels */
-               scanline = subsampled ? mixer->cfg->scanline_yuv : 2048;
+               scanline = subsampled ? mixer->cfg->lay_cfg.scanline_yuv : 2048;
 
                if (src_w > scanline) {
                        DRM_DEBUG_DRIVER("Using horizontal coarse scaling\n");
@@ -278,7 +278,7 @@ static int sun8i_vi_layer_atomic_check(struct drm_plane *plane,
        min_scale = DRM_PLANE_NO_SCALING;
        max_scale = DRM_PLANE_NO_SCALING;
 
-       if (layer->mixer->cfg->scaler_mask & BIT(layer->channel)) {
+       if (layer->mixer->cfg->lay_cfg.scaler_mask & BIT(layer->channel)) {
                min_scale = SUN8I_VI_SCALER_SCALE_MIN;
                max_scale = SUN8I_VI_SCALER_SCALE_MAX;
        }
@@ -452,7 +452,7 @@ struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
                return ERR_PTR(ret);
        }
 
-       if (mixer->cfg->de2_fcc_alpha || mixer->cfg->de_type >= SUN8I_MIXER_DE3) {
+       if (mixer->cfg->lay_cfg.de2_fcc_alpha || mixer->cfg->de_type >= SUN8I_MIXER_DE3) {
                ret = drm_plane_create_alpha_property(&layer->plane);
                if (ret) {
                        dev_err(drm->dev, "Couldn't add alpha property\n");