]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
wifi: rtw89: Fix rtw89_mac_power_switch() for USB
authorBitterblue Smith <rtl8821cerfe2@gmail.com>
Mon, 30 Jun 2025 20:45:55 +0000 (23:45 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 20 Aug 2025 16:41:12 +0000 (18:41 +0200)
[ Upstream commit e2b71603333a9dd73ee88347d8894fffc3456ac1 ]

Clear some bits in some registers in order to allow RTL8851BU to power
on. This is done both when powering on and when powering off because
that's what the vendor driver does.

Also tested with RTL8832BU and RTL8832CU.

Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/a39da939-d640-4486-ad38-f658f220afc8@gmail.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/wireless/realtek/rtw89/mac.c
drivers/net/wireless/realtek/rtw89/reg.h

index 9f0e30e7500927ae57fa13c6f72c87693e42d3ed..94bcdf6abca5c9dfabb9eaaf3684f107007cdbf5 100644 (file)
@@ -1441,6 +1441,23 @@ void rtw89_mac_notify_wake(struct rtw89_dev *rtwdev)
        rtw89_mac_send_rpwm(rtwdev, state, true);
 }
 
+static void rtw89_mac_power_switch_boot_mode(struct rtw89_dev *rtwdev)
+{
+       u32 boot_mode;
+
+       if (rtwdev->hci.type != RTW89_HCI_TYPE_USB)
+               return;
+
+       boot_mode = rtw89_read32_mask(rtwdev, R_AX_GPIO_MUXCFG, B_AX_BOOT_MODE);
+       if (!boot_mode)
+               return;
+
+       rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFN_ONMAC);
+       rtw89_write32_clr(rtwdev, R_AX_SYS_STATUS1, B_AX_AUTO_WLPON);
+       rtw89_write32_clr(rtwdev, R_AX_GPIO_MUXCFG, B_AX_BOOT_MODE);
+       rtw89_write32_clr(rtwdev, R_AX_RSV_CTRL, B_AX_R_DIS_PRST);
+}
+
 static int rtw89_mac_power_switch(struct rtw89_dev *rtwdev, bool on)
 {
 #define PWR_ACT 1
@@ -1451,6 +1468,8 @@ static int rtw89_mac_power_switch(struct rtw89_dev *rtwdev, bool on)
        int ret;
        u8 val;
 
+       rtw89_mac_power_switch_boot_mode(rtwdev);
+
        if (on) {
                cfg_seq = chip->pwr_on_seq;
                cfg_func = chip->ops->pwr_on_func;
index f05c81ae586949212044f60362ba78b0f4b3fdcd..9d9e1b02bfc7c98954f16631f73e15cebb6066ef 100644 (file)
 
 #define R_AX_SYS_STATUS1 0x00F4
 #define B_AX_SEL_0XC0_MASK GENMASK(17, 16)
+#define B_AX_AUTO_WLPON BIT(10)
 #define B_AX_PAD_HCI_SEL_V2_MASK GENMASK(5, 3)
 #define MAC_AX_HCI_SEL_SDIO_UART 0
 #define MAC_AX_HCI_SEL_MULTI_USB 1