arm64: dts: exynos990: Add USB nodes

Add USB controller and USB PHY controller nodes for use in
the Exynos990 SoC.

This SoC supports USB full-speed, high-speed and super-speed modes.

Due to the inability to test PIPE3, USB super-speed is not enabled, and
the USB PHY is only configured for UTMI+ operation for now.

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://lore.kernel.org/r/20250710-resends-july-exynos990-dt-v2-2-55033f73d1b0@mentallysanemainliners.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dts/exynos/exynos990.dtsi
index 4446a1a54ba2de56879353c9c4a898b1d697fc13..bd5e086ac46d3010ace413e2eeb2cd30d7f7672c 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos990.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi
@@ -278,6 +278,37 @@
                                      "dpgtc";
                };
 
+               usbdrd_phy: phy@10c00000 {
+                       compatible = "samsung,exynos990-usbdrd-phy";
+                       reg = <0x10c00000 0x100>;
+                       clocks = <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_ACLK_PHYCTRL>,
+                                <&oscclk>;
+                       clock-names = "phy", "ref";
+                       samsung,pmu-syscon = <&pmu_system_controller>;
+                       #phy-cells = <1>;
+                       status = "disabled";
+               };
+
+               usbdrd: usb@10e00000 {
+                       compatible = "samsung,exynos990-dwusb3",
+                                    "samsung,exynos850-dwusb3";
+                       ranges = <0x0 0x10e00000 0x10000>;
+                       clocks = <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_BUS_CLK_EARLY>,
+                                <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_USB31DRD_REF_CLK_40>;
+                       clock-names = "bus_early", "ref";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       status = "disabled";
+
+                       usbdrd_dwc3: usb@0 {
+                               compatible = "snps,dwc3";
+                               reg = <0x0 0x10000>;
+                               interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;
+                               phys = <&usbdrd_phy 0>;
+                               phy-names = "usb2-phy";
+                       };
+               };
+
                pinctrl_hsi1: pinctrl@13040000 {
                        compatible = "samsung,exynos990-pinctrl";
                        reg = <0x13040000 0x1000>;