drm/i915/cx0: s/XELPDP_PORT_RESET_END_TIMEOUT/XELPDP_PORT_RESET_END_TIMEOUT_MS/

Include the units the in the define name for XELPDP_PORT_RESET_END_TIMEOUT
to make it match all its other counterparts.

v2: It's _MS not _US (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251106155249.2810-1-ville.syrjala@linux.intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index dd1429fa5028b0493266b9f20c25b2d31b101899..1551d30ec584d9ce0bcf68a52ea76ee9a7722b31 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -2926,7 +2926,7 @@ static void intel_cx0_phy_lane_reset(struct intel_encoder *encoder,
 
        if (intel_de_wait_for_clear(display, XELPDP_PORT_BUF_CTL2(display, port),
                                    lane_phy_current_status,
-                                   XELPDP_PORT_RESET_END_TIMEOUT))
+                                   XELPDP_PORT_RESET_END_TIMEOUT_MS))
                drm_warn(display->drm,
                         "PHY %c failed to bring out of lane reset\n",
                         phy_name(phy));

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
index 715ca004516aafe64408e790e6c76085cc1075cb..8df5cd5ce418828555a1e1722fb5325f66437d13 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
@@ -80,7 +80,7 @@
 #define XELPDP_PORT_BUF_SOC_READY_TIMEOUT_US           100
 #define XELPDP_PORT_RESET_START_TIMEOUT_US             5
 #define XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_MS                2
-#define XELPDP_PORT_RESET_END_TIMEOUT                  15
+#define XELPDP_PORT_RESET_END_TIMEOUT_MS               15
 #define XELPDP_REFCLK_ENABLE_TIMEOUT_US                        1
 
 #define _XELPDP_PORT_BUF_CTL1_LN0_A                    0x64004