arm64: dts: qcom: sm8550: Additionally manage MXC power domain in videocc

Videocc requires both MMCX and MXC rails to be powered ON to configure
the video PLLs on SM8550 platform. Hence add MXC power domain to videocc
node on SM8550.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250822-topic-sm8x50-upstream-pll-multi-pd-voting-dt-v2-2-28f35728a146@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index ee597097425584c8210a6310408719539705afbd..3c6f5249946571c79c05a01751e96d7d2831a230 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3307,8 +3307,10 @@
                        reg = <0 0x0aaf0000 0 0x10000>;
                        clocks = <&bi_tcxo_div2>,
                                 <&gcc GCC_VIDEO_AHB_CLK>;
-                       power-domains = <&rpmhpd RPMHPD_MMCX>;
-                       required-opps = <&rpmhpd_opp_low_svs>;
+                       power-domains = <&rpmhpd RPMHPD_MMCX>,
+                                       <&rpmhpd RPMHPD_MXC>;
+                       required-opps = <&rpmhpd_opp_low_svs>,
+                                       <&rpmhpd_opp_low_svs>;
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                        #power-domain-cells = <1>;