reload1.c (eliminate_regs [SET]): If [SUBREG] widened the mode of DEST for the spill...

* reload1.c (eliminate_regs [SET]): If [SUBREG] widened the mode of
DEST for the spill, adjust mode of SRC to compensate.

From-SVN: r16222

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f6a96bdac105c73b68ec0b651d29b29093a2b55a..39a753d0f1679c66d67696c0aae4ebf65af48449 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Tue Oct 28 15:29:15 1997  Richard Henderson  <rth@cygnus.com>
+
+       * reload1.c (eliminate_regs [SET]): If [SUBREG] widened the mode of
+       DEST for the spill, adjust mode of SRC to compensate.
+
 Tue Oct 28 14:36:45 1997  Richard Henderson  <rth@cygnus.com>
 
        * alpha.md (reload_inqi): Check for MEM before strict_memory_address_p,

diff --git a/gcc/reload1.c b/gcc/reload1.c
index a3361abbfadfabb55e8f9ee1c43e714ea4a46674..cbb41308ddb30ce3b38aad78b09ecd43529840c1 100644 (file)
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -3271,6 +3271,12 @@ eliminate_regs (x, mem_mode, insn, storing)
            && GET_CODE (insn) != INSN_LIST)
          emit_insn_after (gen_rtx (CLOBBER, VOIDmode, SET_DEST (x)), insn);
 
+       /* If SET_DEST was a partial-word subreg, NEW0 may have been widened
+          to spill the entire register (see SUBREG case above).  If the 
+          widths of SET_DEST and NEW0 no longer match, adjust NEW1.  */
+       if (GET_MODE (SET_DEST (x)) != GET_MODE (new0))
+         new1 = gen_rtx (SUBREG, GET_MODE (new0), new1, 0);
+
        if (new0 != SET_DEST (x) || new1 != SET_SRC (x))
          return gen_rtx (SET, VOIDmode, new0, new1);
       }