d1: refresh config for 6.18

Refresh config for 6.18.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>

diff --git a/target/linux/d1/config-6.18 b/target/linux/d1/config-6.18
index bedc91f71803603db76a4fd0704935eb6c772ec6..2924e06908d923d26efd667131c6ca95ed827490 100644 (file)
--- a/target/linux/d1/config-6.18
+++ b/target/linux/d1/config-6.18
@@ -1,4 +1,5 @@
 CONFIG_64BIT=y
+# CONFIG_ACLINT_SSWI is not set
 # CONFIG_ACPI is not set
 # CONFIG_ARCH_CANAAN is not set
 CONFIG_ARCH_DMA_ADDR_T_64BIT=y
@@ -264,6 +265,7 @@ CONFIG_PAGE_POOL=y
 CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
 CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
 CONFIG_PANIC_TIMEOUT=0
+# CONFIG_PCIE_DW_DEBUGFS is not set
 CONFIG_PCS_XPCS=y
 CONFIG_PER_VMA_LOCK=y
 CONFIG_PGTABLE_LEVELS=5
@@ -342,30 +344,41 @@ CONFIG_RISCV_ALTERNATIVE_EARLY=y
 CONFIG_RISCV_APLIC=y
 CONFIG_RISCV_APLIC_MSI=y
 CONFIG_RISCV_BOOT_SPINWAIT=y
+CONFIG_RISCV_COMBO_SPINLOCKS=y
 CONFIG_RISCV_DMA_NONCOHERENT=y
 # CONFIG_RISCV_EMULATED_UNALIGNED_ACCESS is not set
 CONFIG_RISCV_IMSIC=y
 CONFIG_RISCV_INTC=y
+# CONFIG_RISCV_IOMMU is not set
 CONFIG_RISCV_ISA_C=y
 CONFIG_RISCV_ISA_FALLBACK=y
+CONFIG_RISCV_ISA_SUPM=y
 CONFIG_RISCV_ISA_SVNAPOT=y
 CONFIG_RISCV_ISA_SVPBMT=y
 CONFIG_RISCV_ISA_V=y
 CONFIG_RISCV_ISA_VENDOR_EXT=y
 CONFIG_RISCV_ISA_VENDOR_EXT_ANDES=y
+# CONFIG_RISCV_ISA_VENDOR_EXT_MIPS is not set
+CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE=y
+# CONFIG_RISCV_ISA_VENDOR_EXT_THEAD is not set
 CONFIG_RISCV_ISA_V_DEFAULT_ENABLE=y
 CONFIG_RISCV_ISA_V_UCOPY_THRESHOLD=768
+# CONFIG_RISCV_ISA_XTHEADVECTOR is not set
+CONFIG_RISCV_ISA_ZACAS=y
 CONFIG_RISCV_ISA_ZAWRS=y
 CONFIG_RISCV_ISA_ZBA=y
 CONFIG_RISCV_ISA_ZBB=y
 CONFIG_RISCV_ISA_ZBC=y
+CONFIG_RISCV_ISA_ZBKB=y
 CONFIG_RISCV_ISA_ZICBOM=y
+CONFIG_RISCV_ISA_ZICBOP=y
 CONFIG_RISCV_ISA_ZICBOZ=y
 CONFIG_RISCV_MISALIGNED=y
 CONFIG_RISCV_NONSTANDARD_CACHE_OPS=y
 CONFIG_RISCV_PROBE_UNALIGNED_ACCESS=y
 CONFIG_RISCV_SBI=y
 CONFIG_RISCV_SBI_V01=y
+# CONFIG_RISCV_TICKET_SPINLOCKS is not set
 CONFIG_RISCV_TIMER=y
 CONFIG_RISCV_USE_LINKER_RELAXATION=y
 # CONFIG_RPS is not set