]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: Remove a few holes from struct amdgpu_ctx
authorTvrtko Ursulin <tvrtko.ursulin@igalia.com>
Mon, 12 Jan 2026 10:22:37 +0000 (10:22 +0000)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 23 Feb 2026 19:16:31 +0000 (14:16 -0500)
Re-order the struct members a bit to avoid some holes:

 /* size: 408, cachelines: 7, members: 15 */
 /* sum members: 393, holes: 4, sum holes: 15 */
 /* last cacheline: 24 bytes */

 /* size: 400, cachelines: 7, members: 15 */
 /* sum members: 393, holes: 1, sum holes: 7 */
 /* last cacheline: 16 bytes */

While doing so we notice a duplicate but will address than in the
following patch.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h

index 090dfe86f75ba0d36f1814b5b403ff806492bda1..aed758d0acaadfd43910afe8b46957e3dd1ec4d1 100644 (file)
@@ -44,20 +44,20 @@ struct amdgpu_ctx_entity {
 
 struct amdgpu_ctx {
        struct kref                     refcount;
-       struct amdgpu_ctx_mgr           *mgr;
+       spinlock_t                      ring_lock;
        unsigned                        reset_counter;
        unsigned                        reset_counter_query;
-       uint64_t                        generation;
-       spinlock_t                      ring_lock;
-       struct amdgpu_ctx_entity        *entities[AMDGPU_HW_IP_NUM][AMDGPU_MAX_ENTITY_NUM];
-       bool                            preamble_presented;
        int32_t                         init_priority;
        int32_t                         override_priority;
+       uint32_t                        stable_pstate;
        atomic_t                        guilty;
+       bool                            preamble_presented;
+       uint64_t                        generation;
        unsigned long                   ras_counter_ce;
        unsigned long                   ras_counter_ue;
-       uint32_t                        stable_pstate;
+       struct amdgpu_ctx_mgr           *mgr;
        struct amdgpu_ctx_mgr           *ctx_mgr;
+       struct amdgpu_ctx_entity        *entities[AMDGPU_HW_IP_NUM][AMDGPU_MAX_ENTITY_NUM];
 };
 
 struct amdgpu_ctx_mgr {