Re-order the struct members a bit to avoid some holes:
/* size: 408, cachelines: 7, members: 15 */
/* sum members: 393, holes: 4, sum holes: 15 */
/* last cacheline: 24 bytes */
/* size: 400, cachelines: 7, members: 15 */
/* sum members: 393, holes: 1, sum holes: 7 */
/* last cacheline: 16 bytes */
While doing so we notice a duplicate but will address than in the
following patch.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
struct amdgpu_ctx {
struct kref refcount;
- struct amdgpu_ctx_mgr *mgr;
+ spinlock_t ring_lock;
unsigned reset_counter;
unsigned reset_counter_query;
- uint64_t generation;
- spinlock_t ring_lock;
- struct amdgpu_ctx_entity *entities[AMDGPU_HW_IP_NUM][AMDGPU_MAX_ENTITY_NUM];
- bool preamble_presented;
int32_t init_priority;
int32_t override_priority;
+ uint32_t stable_pstate;
atomic_t guilty;
+ bool preamble_presented;
+ uint64_t generation;
unsigned long ras_counter_ce;
unsigned long ras_counter_ue;
- uint32_t stable_pstate;
+ struct amdgpu_ctx_mgr *mgr;
struct amdgpu_ctx_mgr *ctx_mgr;
+ struct amdgpu_ctx_entity *entities[AMDGPU_HW_IP_NUM][AMDGPU_MAX_ENTITY_NUM];
};
struct amdgpu_ctx_mgr {