The same functionality was tested on zcu102 and this patch is keeping
configs align.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102 rev1.0"
CONFIG_ZYNQMP_QSPI=y
CONFIG_ZYNQMP_USB=y
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102 revB"
CONFIG_ZYNQMP_QSPI=y
CONFIG_ZYNQMP_USB=y