]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
sf: Add bank address register writing support
authorJagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tue, 1 Jan 2013 14:08:07 +0000 (19:38 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 22 Jan 2013 13:16:00 +0000 (14:16 +0100)
This patch provides support to program a flash bank address
register.

bank address register contains an information to access the
4th byte addressing.

Currently added bank address register writing support for
spansion flashes.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
drivers/mtd/spi/spi_flash.c
drivers/mtd/spi/spi_flash_internal.h

index 17812893e4b350e98dd5dfe98133fa508e0f31ea..39f85a898017473aafbd5d23c899be0ed0e2a80a 100644 (file)
@@ -285,6 +285,33 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
        return 0;
 }
 
+int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 ear)
+{
+       u8 cmd;
+       int ret;
+
+       ret = spi_flash_cmd_write_enable(flash);
+       if (ret < 0) {
+               debug("SF: enabling write failed\n");
+               return ret;
+       }
+
+       cmd = CMD_BANKADDR_BRWR;
+       ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &ear, 1);
+       if (ret) {
+               debug("SF: fail to write bank addr register\n");
+               return ret;
+       }
+
+       ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+       if (ret < 0) {
+               debug("SF: write config register timed out\n");
+               return ret;
+       }
+
+       return 0;
+}
+
 /*
  * The following table holds all device probe functions
  *
index 141cfa8b26d75e6e816c7315530854a93035b803..d507fd28625997793935f0bd08c5fcd8fb4aebb0 100644 (file)
@@ -28,6 +28,9 @@
 #define CMD_ERASE_64K                  0xd8
 #define CMD_ERASE_CHIP                 0xc7
 
+/* Bank addr acess commands */
+#define CMD_BANKADDR_BRWR              0x17
+
 /* Common status */
 #define STATUS_WIP                     0x01
 
@@ -77,6 +80,9 @@ static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
 /* Program the status register. */
 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
 
+/* Program the bank address register */
+int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 ear);
+
 /*
  * Same as spi_flash_cmd_read() except it also claims/releases the SPI
  * bus. Used as common part of the ->read() operation.