]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
ASoC: cs35l41: sort the register default table
authorPeter Ujfalusi <peter.ujfalusi@linux.intel.com>
Wed, 5 Aug 2026 08:24:11 +0000 (11:24 +0300)
committerMark Brown <broonie@kernel.org>
Wed, 5 Aug 2026 12:34:34 +0000 (13:34 +0100)
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch().  See commit
fd80df352ba1 ("regcache: Add support for sorting defaults arrays").

cs35l41_reg[] lists CS35L41_BSTCVRT_PEAK_CUR (0x3808) after
CS35L41_BSTCVRT_COEFF (0x3810) and CS35L41_BSTCVRT_SLOPE_LBST (0x3814), so
the binary search does not find those two entries.
regcache_reg_needs_sync() then cannot compare them against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.

Sort the table by register address.

Fixes: 5f2f539901b0 ("ASoC: cs35l41: Correct handling of some registers in the cache")
Cc: stable@vger.kernel.org
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Reviewed-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Link: https://patch.msgid.link/20260805082413.26174-2-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/cs35l41-lib.c

index 1702f26049d37ee15c1d6db7055c8b2f12bd11f1..b0fa80705be7d2b80a3c69fcacf287c7fc35c798 100644 (file)
@@ -25,9 +25,9 @@ static const struct reg_default cs35l41_reg[] = {
        { CS35L41_GPIO_PAD_CONTROL,             0x00000000 },
        { CS35L41_GLOBAL_CLK_CTRL,              0x00000003 },
        { CS35L41_TST_FS_MON0,                  0x00020016 },
+       { CS35L41_BSTCVRT_PEAK_CUR,             0x0000004A },
        { CS35L41_BSTCVRT_COEFF,                0x00002424 },
        { CS35L41_BSTCVRT_SLOPE_LBST,           0x00007500 },
-       { CS35L41_BSTCVRT_PEAK_CUR,             0x0000004A },
        { CS35L41_SP_ENABLES,                   0x00000000 },
        { CS35L41_SP_RATE_CTRL,                 0x00000028 },
        { CS35L41_SP_FORMAT,                    0x18180200 },