--- /dev/null
+From 3a1d7aff6e65ad6e285e28abe55abbfd484997ee Mon Sep 17 00:00:00 2001
+From: Juerg Haefliger <juerg.haefliger@canonical.com>
+Date: Wed, 28 Jun 2023 11:50:39 +0200
+Subject: fsi: master-ast-cf: Add MODULE_FIRMWARE macro
+
+From: Juerg Haefliger <juerg.haefliger@canonical.com>
+
+commit 3a1d7aff6e65ad6e285e28abe55abbfd484997ee upstream.
+
+The module loads firmware so add a MODULE_FIRMWARE macro to provide that
+information via modinfo.
+
+Fixes: 6a794a27daca ("fsi: master-ast-cf: Add new FSI master using Aspeed ColdFire")
+Cc: stable@vger.kernel.org # 4.19+
+Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com>
+Link: https://lore.kernel.org/r/20230628095039.26218-1-juerg.haefliger@canonical.com
+Signed-off-by: Joel Stanley <joel@jms.id.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/fsi/fsi-master-ast-cf.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/fsi/fsi-master-ast-cf.c
++++ b/drivers/fsi/fsi-master-ast-cf.c
+@@ -1438,3 +1438,4 @@ static struct platform_driver fsi_master
+
+ module_platform_driver(fsi_master_acf);
+ MODULE_LICENSE("GPL");
++MODULE_FIRMWARE(FW_FILE_NAME);
--- /dev/null
+From 9baeea723c0fb9c3ba9a336369f758ed9bc6831d Mon Sep 17 00:00:00 2001
+From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
+Date: Mon, 7 Aug 2023 17:45:55 -0400
+Subject: serial: sc16is7xx: fix bug when first setting GPIO direction
+
+From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
+
+commit 9baeea723c0fb9c3ba9a336369f758ed9bc6831d upstream.
+
+When configuring a pin as an output pin with a value of logic 0, we
+end up as having a value of logic 1 on the output pin. Setting a
+logic 0 a second time (or more) after that will correctly output a
+logic 0 on the output pin.
+
+By default, all GPIO pins are configured as inputs. When we enter
+sc16is7xx_gpio_direction_output() for the first time, we first set the
+desired value in IOSTATE, and then we configure the pin as an output.
+The datasheet states that writing to IOSTATE register will trigger a
+transfer of the value to the I/O pin configured as output, so if the
+pin is configured as an input, nothing will be transferred.
+
+Therefore, set the direction first in IODIR, and then set the desired
+value in IOSTATE.
+
+This is what is done in NXP application note AN10587.
+
+Fixes: dfeae619d781 ("serial: sc16is7xx")
+Cc: stable@vger.kernel.org
+Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
+Reviewed-by: Lech Perczak <lech.perczak@camlingroup.com>
+Tested-by: Lech Perczak <lech.perczak@camlingroup.com>
+Link: https://lore.kernel.org/r/20230807214556.540627-6-hugo@hugovil.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/tty/serial/sc16is7xx.c | 11 ++++++++++-
+ 1 file changed, 10 insertions(+), 1 deletion(-)
+
+--- a/drivers/tty/serial/sc16is7xx.c
++++ b/drivers/tty/serial/sc16is7xx.c
+@@ -1166,9 +1166,18 @@ static int sc16is7xx_gpio_direction_outp
+ state |= BIT(offset);
+ else
+ state &= ~BIT(offset);
+- sc16is7xx_port_write(port, SC16IS7XX_IOSTATE_REG, state);
++
++ /*
++ * If we write IOSTATE first, and then IODIR, the output value is not
++ * transferred to the corresponding I/O pin.
++ * The datasheet states that each register bit will be transferred to
++ * the corresponding I/O pin programmed as output when writing to
++ * IOSTATE. Therefore, configure direction first with IODIR, and then
++ * set value after with IOSTATE.
++ */
+ sc16is7xx_port_update(port, SC16IS7XX_IODIR_REG, BIT(offset),
+ BIT(offset));
++ sc16is7xx_port_write(port, SC16IS7XX_IOSTATE_REG, state);
+
+ return 0;
+ }