Fix vext[us]64_1.c test on ARM by unsharing test body.

	* gcc.target/arm/simd/vexts64_1.c: Remove #include, inline test body.
	* gcc.target/arm/simd/vextu64_1.c: Likewise.
	* gcc.target/aarch64/simd/ext_s64_1.c: Likewise.
	* gcc.target/aarch64/simd/ext_u64_1.c: Likewise.
	* gcc.target/aarch64/simd/ext_s64.x: Remove.
	* gcc.target/aarch64/simd/ext_u64.x: Remove.

From-SVN: r212914

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 3bb59a60ddf372f32a8b66b6b58e70c6549da0d3..c68ce3c3d35c3e39883e5567b23530f40792f5b0 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2014-07-22  Alan Lawrence  <alan.lawrence@arm.com>
+
+       * gcc.target/arm/simd/vexts64_1.c: Remove #include, inline test body.
+       * gcc.target/arm/simd/vextu64_1.c: Likewise.
+       * gcc.target/aarch64/simd/ext_s64_1.c: Likewise.
+       * gcc.target/aarch64/simd/ext_u64_1.c: Likewise.
+       * gcc.target/aarch64/simd/ext_s64.x: Remove.
+       * gcc.target/aarch64/simd/ext_u64.x: Remove.
+
 2014-07-22  Yuri Rumyantsev  <ysrumyan@gmail.com>
 
        PR tree-optimization/61822

diff --git a/gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x b/gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x
deleted file mode 100644 (file)
index b879fda..0000000
--- a/gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x
+++ /dev/null
@@ -1,17 +0,0 @@
-extern void abort (void);
-
-int
-main (int argc, char **argv)
-{
-  int i, off;
-  int64_t arr1[] = {0};
-  int64x1_t in1 = vld1_s64 (arr1);
-  int64_t arr2[] = {1};
-  int64x1_t in2 = vld1_s64 (arr2);
-  int64x1_t actual = vext_s64 (in1, in2, 0);
-  if (actual[0] != in1[0])
-    abort ();
-
-  return 0;
-}
-

diff --git a/gcc/testsuite/gcc.target/aarch64/simd/ext_s64_1.c b/gcc/testsuite/gcc.target/aarch64/simd/ext_s64_1.c
index 1e2748d97431457e0fe0f2f9f04e610d40c43e8d..5d246978345b85ad93c1d19cc7aaf09d9a50056c 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/simd/ext_s64_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/ext_s64_1.c
@@ -4,7 +4,22 @@
 /* { dg-options "-save-temps -O3 -fno-inline" } */
 
 #include "arm_neon.h"
-#include "ext_s64.x"
+
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+  int64_t arr1[] = {0};
+  int64x1_t in1 = vld1_s64 (arr1);
+  int64_t arr2[] = {1};
+  int64x1_t in2 = vld1_s64 (arr2);
+  int64x1_t actual = vext_s64 (in1, in2, 0);
+  if (actual[0] != in1[0])
+    abort ();
+
+  return 0;
+}
 
 /* Do not scan-assembler.  An EXT instruction could be emitted, but would merely
    return its first argument, so it is legitimate to optimize it out.  */

diff --git a/gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x b/gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x
deleted file mode 100644 (file)
index bd51e27..0000000
--- a/gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x
+++ /dev/null
@@ -1,17 +0,0 @@
-extern void abort (void);
-
-int
-main (int argc, char **argv)
-{
-  int i, off;
-  uint64_t arr1[] = {0};
-  uint64x1_t in1 = vld1_u64 (arr1);
-  uint64_t arr2[] = {1};
-  uint64x1_t in2 = vld1_u64 (arr2);
-  uint64x1_t actual = vext_u64 (in1, in2, 0);
-  if (actual[0] != in1[0])
-    abort ();
-
-  return 0;
-}
-

diff --git a/gcc/testsuite/gcc.target/aarch64/simd/ext_u64_1.c b/gcc/testsuite/gcc.target/aarch64/simd/ext_u64_1.c
index e6779f70bc772cc217736d1a3e0499f8abbf3259..644b73202567fdb5fdc779f48bf398c9e5268c00 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/simd/ext_u64_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/ext_u64_1.c
@@ -4,7 +4,22 @@
 /* { dg-options "-save-temps -O3 -fno-inline" } */
 
 #include "arm_neon.h"
-#include "ext_u64.x"
+
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+  uint64_t arr1[] = {0};
+  uint64x1_t in1 = vld1_u64 (arr1);
+  uint64_t arr2[] = {1};
+  uint64x1_t in2 = vld1_u64 (arr2);
+  uint64x1_t actual = vext_u64 (in1, in2, 0);
+  if (actual[0] != in1[0])
+    abort ();
+
+  return 0;
+}
 
 /* Do not scan-assembler.  An EXT instruction could be emitted, but would merely
    return its first argument, so it is legitimate to optimize it out.  */

diff --git a/gcc/testsuite/gcc.target/arm/simd/vexts64_1.c b/gcc/testsuite/gcc.target/arm/simd/vexts64_1.c
index 7bb20121988d0d930a84211c574dfe99da8cb995..10053a5e398e8c01ac3ad78d93d13db33d4bb668 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/simd/vexts64_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vexts64_1.c
@@ -6,7 +6,22 @@
 /* { dg-add-options arm_neon } */
 
 #include "arm_neon.h"
-#include "../../aarch64/simd/ext_s64.x"
+
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+  int64_t arr1[] = {0};
+  int64x1_t in1 = vld1_s64 (arr1);
+  int64_t arr2[] = {1};
+  int64x1_t in2 = vld1_s64 (arr2);
+  int64x1_t actual = vext_s64 (in1, in2, 0);
+  if (actual != in1)
+    abort ();
+
+  return 0;
+}
 
 /* Don't scan assembler for vext - it can be optimized into a move from r0.  */
 /* { dg-final { cleanup-saved-temps } } */

diff --git a/gcc/testsuite/gcc.target/arm/simd/vextu64_1.c b/gcc/testsuite/gcc.target/arm/simd/vextu64_1.c
index 39ffc56cba74ba7ddbb7a6cb0005de0357bd8516..eeb0be2732c083f3aafa3d3067959e13f05cb47d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/simd/vextu64_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vextu64_1.c
@@ -6,7 +6,22 @@
 /* { dg-add-options arm_neon } */
 
 #include "arm_neon.h"
-#include "../../aarch64/simd/ext_u64.x"
+
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+  uint64_t arr1[] = {0};
+  uint64x1_t in1 = vld1_u64 (arr1);
+  uint64_t arr2[] = {1};
+  uint64x1_t in2 = vld1_u64 (arr2);
+  uint64x1_t actual = vext_u64 (in1, in2, 0);
+  if (actual != in1)
+    abort ();
+
+  return 0;
+}
 
 /* Don't scan assembler for vext - it can be optimized into a move from r0.  */
 /* { dg-final { cleanup-saved-temps } } */