clk: ti: fapll: convert from round_rate() to determine_rate()

The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Tested-by: Anddreas Kemnade <andreas@kemnade.info> # OMAP3 GTA04, OMAP4 Panda
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Brian Masney <bmasney@redhat.com>

diff --git a/drivers/clk/ti/fapll.c b/drivers/clk/ti/fapll.c
index 2db3fc4a443e052722d5c01e5ef38cc1417d818f..4f28138d2d8abfa63e13c23d6a7326f3a2cdbf86 100644 (file)
--- a/drivers/clk/ti/fapll.c
+++ b/drivers/clk/ti/fapll.c
@@ -214,24 +214,27 @@ static int ti_fapll_set_div_mult(unsigned long rate,
        return 0;
 }
 
-static long ti_fapll_round_rate(struct clk_hw *hw, unsigned long rate,
-                               unsigned long *parent_rate)
+static int ti_fapll_determine_rate(struct clk_hw *hw,
+                                  struct clk_rate_request *req)
 {
        u32 pre_div_p, mult_n;
        int error;
 
-       if (!rate)
+       if (!req->rate)
                return -EINVAL;
 
-       error = ti_fapll_set_div_mult(rate, *parent_rate,
+       error = ti_fapll_set_div_mult(req->rate, req->best_parent_rate,
                                      &pre_div_p, &mult_n);
-       if (error)
-               return error;
+       if (error) {
+               req->rate = error;
 
-       rate = *parent_rate / pre_div_p;
-       rate *= mult_n;
+               return 0;
+       }
 
-       return rate;
+       req->rate = req->best_parent_rate / pre_div_p;
+       req->rate *= mult_n;
+
+       return 0;
 }
 
 static int ti_fapll_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -268,7 +271,7 @@ static const struct clk_ops ti_fapll_ops = {
        .is_enabled = ti_fapll_is_enabled,
        .recalc_rate = ti_fapll_recalc_rate,
        .get_parent = ti_fapll_get_parent,
-       .round_rate = ti_fapll_round_rate,
+       .determine_rate = ti_fapll_determine_rate,
        .set_rate = ti_fapll_set_rate,
 };
 
@@ -399,14 +402,14 @@ static u32 ti_fapll_synth_set_frac_rate(struct fapll_synth *synth,
        return post_div_m;
 }
 
-static long ti_fapll_synth_round_rate(struct clk_hw *hw, unsigned long rate,
-                                     unsigned long *parent_rate)
+static int ti_fapll_synth_determine_rate(struct clk_hw *hw,
+                                        struct clk_rate_request *req)
 {
        struct fapll_synth *synth = to_synth(hw);
        struct fapll_data *fd = synth->fd;
        unsigned long r;
 
-       if (ti_fapll_clock_is_bypass(fd) || !synth->div || !rate)
+       if (ti_fapll_clock_is_bypass(fd) || !synth->div || !req->rate)
                return -EINVAL;
 
        /* Only post divider m available with no fractional divider? */
@@ -414,23 +417,26 @@ static long ti_fapll_synth_round_rate(struct clk_hw *hw, unsigned long rate,
                unsigned long frac_rate;
                u32 synth_post_div_m;
 
-               frac_rate = ti_fapll_synth_get_frac_rate(hw, *parent_rate);
-               synth_post_div_m = DIV_ROUND_UP(frac_rate, rate);
+               frac_rate = ti_fapll_synth_get_frac_rate(hw,
+                                                        req->best_parent_rate);
+               synth_post_div_m = DIV_ROUND_UP(frac_rate, req->rate);
                r = DIV_ROUND_UP(frac_rate, synth_post_div_m);
                goto out;
        }
 
-       r = *parent_rate * SYNTH_PHASE_K;
-       if (rate > r)
+       r = req->best_parent_rate * SYNTH_PHASE_K;
+       if (req->rate > r)
                goto out;
 
        r = DIV_ROUND_UP_ULL(r, SYNTH_MAX_INT_DIV * SYNTH_MAX_DIV_M);
-       if (rate < r)
+       if (req->rate < r)
                goto out;
 
-       r = rate;
+       r = req->rate;
 out:
-       return r;
+       req->rate = r;
+
+       return 0;
 }
 
 static int ti_fapll_synth_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -477,7 +483,7 @@ static const struct clk_ops ti_fapll_synt_ops = {
        .disable = ti_fapll_synth_disable,
        .is_enabled = ti_fapll_synth_is_enabled,
        .recalc_rate = ti_fapll_synth_recalc_rate,
-       .round_rate = ti_fapll_synth_round_rate,
+       .determine_rate = ti_fapll_synth_determine_rate,
        .set_rate = ti_fapll_synth_set_rate,
 };