]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
arm64: dts: renesas: Disable SCIF1 in Renesas R-Car X5H R8A78000 SoC DT
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Sun, 15 Mar 2026 23:51:59 +0000 (00:51 +0100)
committerMarek Vasut <marek.vasut+renesas@mailbox.org>
Sat, 4 Apr 2026 21:46:31 +0000 (23:46 +0200)
Disable incorrectly enabled SCIF1 in Renesas R-Car X5H R8A78000 SoC DT.
The SCIF1 should be enabled on board DT level in case it is needed, but
should be disabled in SoC DT by default. This had no adverse effect on
the currently upstream platforms, because those managed to probe only
the HSCIF0 device and SCIF1 was ignored.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
arch/arm/dts/r8a78000.dtsi

index 0d0c24503e2bab9c00b38a1fb9fc5d555239aa0f..89c2881fa9418d3c0f5acdc0c7e0cd2cdb727040 100644 (file)
                        interrupts = <GIC_SPI 4075 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&dummy_clk_sgasyncd16>, <&dummy_clk_sgasyncd16>, <&scif_clk>;
                        clock-names = "fck", "brg_int", "scif_clk";
-                       status = "okay";
+                       status = "disabled";
                };
 
                scif3: serial@c0708000 {