x86 host: do spill/reload of floating point registers.

git-svn-id: svn://svn.valgrind.org/vex/trunk@296

diff --git a/VEX/priv/host-x86/hdefs.c b/VEX/priv/host-x86/hdefs.c
index 73db178a2a93b291633bb4d12e4cd7ec5b95fed8..2ea601662ad57728325a618c27a30442e7f916c0 100644 (file)
--- a/VEX/priv/host-x86/hdefs.c
+++ b/VEX/priv/host-x86/hdefs.c
@@ -1071,16 +1071,18 @@ Bool isMove_X86Instr ( X86Instr* i, HReg* src, HReg* dst )
 
 X86Instr* genSpill_X86 ( HReg rreg, Int offset )
 {
+   X86AMode* am;
    Int base = 4 * 55;
    vassert(offset >= 0);
    vassert(offset <= 4*(100-1));
    vassert(!hregIsVirtual(rreg));
+   am = X86AMode_IR(offset + base, hregX86_EBP());
+
    switch (hregClass(rreg)) {
       case HRcInt:
-        return
-        X86Instr_Alu32M ( Xalu_MOV, X86RI_Reg(rreg), 
-                          X86AMode_IR(offset + base, 
-                                      hregX86_EBP()));
+         return X86Instr_Alu32M ( Xalu_MOV, X86RI_Reg(rreg), am );
+      case HRcFloat:
+         return X86Instr_FpLdSt ( False/*store*/, 8, rreg, am );
       default: 
          ppHRegClass(hregClass(rreg));
          vpanic("genSpill_X86: unimplemented regclass");
@@ -1089,17 +1091,17 @@ X86Instr* genSpill_X86 ( HReg rreg, Int offset )
 
 X86Instr* genReload_X86 ( HReg rreg, Int offset )
 {
+   X86AMode* am;
    Int base = 4 * 55;
    vassert(offset >= 0);
    vassert(offset <= 4*(100-1));
    vassert(!hregIsVirtual(rreg));
+   am = X86AMode_IR(offset + base, hregX86_EBP());
    switch (hregClass(rreg)) {
       case HRcInt:
-        return
-        X86Instr_Alu32R ( Xalu_MOV, 
-                          X86RMI_Mem(X86AMode_IR(offset + base, 
-                                                 hregX86_EBP())),
-                          rreg );
+         return X86Instr_Alu32R ( Xalu_MOV, X86RMI_Mem(am), rreg );
+      case HRcFloat:
+         return X86Instr_FpLdSt ( True/*load*/, 8, rreg, am );
       default: 
          ppHRegClass(hregClass(rreg));
          vpanic("genReload_X86: unimplemented regclass");