clk: qcom: gcc-sdm660: Add missing LPASS/CDSP vote clocks

For the proper functioning of SMMUs related to the audio/compute DSPs,
it makes sense that the clocks and power domains they rely on for
communication should be online.

Add the vote clocks & GDSCs that, when enabled, ensure all such
requirements are met, through various internal mechanisms.

Co-developed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Nickolay Goppen <setotau@yandex.ru>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250815-gcc-sdm660-vote-clocks-and-gdscs-v1-2-c5a8af040093@yandex.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c
index 01a76f1b5b4c146937a4f5fa0011309fd6ed6be8..20253a06a5839b7265548b4f9fdc1ffc9cf6f9f5 100644 (file)
--- a/drivers/clk/qcom/gcc-sdm660.c
+++ b/drivers/clk/qcom/gcc-sdm660.c
@@ -2247,6 +2247,45 @@ static struct clk_branch gcc_usb_phy_cfg_ahb2phy_clk = {
        },
 };
 
+static struct clk_branch hlos1_vote_lpass_adsp_smmu_clk = {
+       .halt_reg = 0x7d014,
+       .halt_check = BRANCH_VOTED,
+       .clkr = {
+               .enable_reg = 0x7d014,
+               .enable_mask = BIT(0),
+               .hw.init = &(const struct clk_init_data) {
+                       .name = "hlos1_vote_lpass_adsp_smmu_clk",
+                       .ops = &clk_branch2_ops,
+               },
+       },
+};
+
+static struct clk_branch hlos1_vote_turing_adsp_smmu_clk = {
+       .halt_reg = 0x7d048,
+       .halt_check = BRANCH_VOTED,
+       .clkr = {
+               .enable_reg = 0x7d048,
+               .enable_mask = BIT(0),
+               .hw.init = &(const struct clk_init_data) {
+                       .name = "hlos1_vote_turing_adsp_smmu_clk",
+                       .ops = &clk_branch2_ops,
+               },
+       },
+};
+
+static struct clk_branch hlos2_vote_turing_adsp_smmu_clk = {
+       .halt_reg = 0x7e048,
+       .halt_check = BRANCH_VOTED,
+       .clkr = {
+               .enable_reg = 0x7e048,
+               .enable_mask = BIT(0),
+               .hw.init = &(const struct clk_init_data) {
+                       .name = "hlos2_vote_turing_adsp_smmu_clk",
+                       .ops = &clk_branch2_ops,
+               },
+       },
+};
+
 static struct gdsc ufs_gdsc = {
        .gdscr = 0x75004,
        .gds_hw_ctrl = 0x0,
@@ -2277,6 +2316,33 @@ static struct gdsc pcie_0_gdsc = {
        .flags = VOTABLE,
 };
 
+static struct gdsc hlos1_vote_turing_adsp_gdsc = {
+       .gdscr = 0x7d04c,
+       .pd = {
+               .name = "hlos1_vote_turing_adsp_gdsc",
+       },
+       .pwrsts = PWRSTS_OFF_ON,
+       .flags = VOTABLE,
+};
+
+static struct gdsc hlos2_vote_turing_adsp_gdsc = {
+       .gdscr = 0x7e04c,
+       .pd = {
+               .name = "hlos2_vote_turing_adsp_gdsc",
+       },
+       .pwrsts = PWRSTS_OFF_ON,
+       .flags = VOTABLE,
+};
+
+static struct gdsc hlos1_vote_lpass_adsp_gdsc = {
+       .gdscr = 0x7d034,
+       .pd = {
+               .name = "hlos1_vote_lpass_adsp_gdsc",
+       },
+       .pwrsts = PWRSTS_OFF_ON,
+       .flags = VOTABLE,
+};
+
 static struct clk_hw *gcc_sdm660_hws[] = {
        &xo.hw,
        &gpll0_early_div.hw,
@@ -2409,12 +2475,18 @@ static struct clk_regmap *gcc_sdm660_clocks[] = {
        [USB30_MASTER_CLK_SRC] = &usb30_master_clk_src.clkr,
        [USB30_MOCK_UTMI_CLK_SRC] = &usb30_mock_utmi_clk_src.clkr,
        [USB3_PHY_AUX_CLK_SRC] = &usb3_phy_aux_clk_src.clkr,
+       [GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK] = &hlos1_vote_lpass_adsp_smmu_clk.clkr,
+       [GCC_HLOS1_VOTE_TURING_ADSP_SMMU_CLK] = &hlos1_vote_turing_adsp_smmu_clk.clkr,
+       [GCC_HLOS2_VOTE_TURING_ADSP_SMMU_CLK] = &hlos2_vote_turing_adsp_smmu_clk.clkr,
 };
 
 static struct gdsc *gcc_sdm660_gdscs[] = {
        [UFS_GDSC] = &ufs_gdsc,
        [USB_30_GDSC] = &usb_30_gdsc,
        [PCIE_0_GDSC] = &pcie_0_gdsc,
+       [HLOS1_VOTE_TURING_ADSP_GDSC] = &hlos1_vote_turing_adsp_gdsc,
+       [HLOS2_VOTE_TURING_ADSP_GDSC] = &hlos2_vote_turing_adsp_gdsc,
+       [HLOS1_VOTE_LPASS_ADSP_GDSC] = &hlos1_vote_lpass_adsp_gdsc,
 };
 
 static const struct qcom_reset_map gcc_sdm660_resets[] = {