net: dpaa: fix mode setting

Before converting to the phylink interface, the init function would have
set a non-reserved I/F mode in the maccfg2 register. After converting to
phylink, 0 is written as mode, which is a reserved value (although it's
the hardware default). Without a valid mode, a SGMII link is never
established between the MAC and the PHY and thus .link_up() is never
called which could set the correct mode according to the actual speed.

Fix it by setting the maximum speed of the phy_interface_t in use in
.mac_config() - just like the driver did before the phylink conversion.

Fixes: 5d93cfcf7360 ("net: dpaa: Convert to phylink")
Suggested-by: Sean Anderson <sean.anderson@linux.dev>
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Sean Anderson <sean.anderson@linux.dev>
Reviewed-by: Sean Anderson <sean.anderson@linux.dev>
Link: https://patch.msgid.link/20260717132401.2653252-1-mwalle@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index fe35703c509e55d66a3e61245512c2c9b892f5c7..b8d70c0ecb6c661c7342772151fe778c41ba06b2 100644 (file)
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -900,22 +900,28 @@ static void dtsec_mac_config(struct phylink_config *config, unsigned int mode,
 {
        struct mac_device *mac_dev = fman_config_to_mac(config);
        struct dtsec_regs __iomem *regs = mac_dev->fman_mac->regs;
-       u32 tmp;
+       u32 ecntrl, maccfg2;
+
+       maccfg2 = ioread32be(&regs->maccfg2);
+       maccfg2 &= ~(MACCFG2_NIBBLE_MODE | MACCFG2_BYTE_MODE);
 
        switch (state->interface) {
        case PHY_INTERFACE_MODE_RMII:
-               tmp = DTSEC_ECNTRL_RMM;
+               ecntrl = DTSEC_ECNTRL_RMM;
+               maccfg2 |= MACCFG2_NIBBLE_MODE;
                break;
        case PHY_INTERFACE_MODE_RGMII:
        case PHY_INTERFACE_MODE_RGMII_ID:
        case PHY_INTERFACE_MODE_RGMII_RXID:
        case PHY_INTERFACE_MODE_RGMII_TXID:
-               tmp = DTSEC_ECNTRL_GMIIM | DTSEC_ECNTRL_RPM;
+               ecntrl = DTSEC_ECNTRL_GMIIM | DTSEC_ECNTRL_RPM;
+               maccfg2 |= MACCFG2_BYTE_MODE;
                break;
        case PHY_INTERFACE_MODE_SGMII:
        case PHY_INTERFACE_MODE_1000BASEX:
        case PHY_INTERFACE_MODE_2500BASEX:
-               tmp = DTSEC_ECNTRL_TBIM | DTSEC_ECNTRL_SGMIIM;
+               ecntrl = DTSEC_ECNTRL_TBIM | DTSEC_ECNTRL_SGMIIM;
+               maccfg2 |= MACCFG2_BYTE_MODE;
                break;
        default:
                dev_warn(mac_dev->dev, "cannot configure dTSEC for %s\n",
@@ -923,7 +929,8 @@ static void dtsec_mac_config(struct phylink_config *config, unsigned int mode,
                return;
        }
 
-       iowrite32be(tmp, &regs->ecntrl);
+       iowrite32be(ecntrl, &regs->ecntrl);
+       iowrite32be(maccfg2, &regs->maccfg2);
 }
 
 static void dtsec_link_up(struct phylink_config *config, struct phy_device *phy,