]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: ls1012a: add DTS for TQMLS1012al module with MBLS1012AL board
authorMatthias Schiffer <matthias.schiffer@tq-group.com>
Fri, 25 Jul 2025 06:24:51 +0000 (08:24 +0200)
committerShawn Guo <shawnguo@kernel.org>
Fri, 22 Aug 2025 03:40:15 +0000 (11:40 +0800)
Add initial support for TQMLS1012AL module mounted on MBLS1012AL.
It supports UART1 for console, PCIe, I2C, USB, µSD card (default), SATA
and QSPI.
There is an alternative ordering option which provides an eMMC instead of
an SD card. This uses a different DT instead.
Due missing Packet Forwarding Engine (PFE) driver support, there is no
support for Ethernet so far.

Signed-off-by: Max Merchel <Max.Merchel@tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/Makefile
arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al-emmc.dts [new file with mode: 0644]
arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al.dts [new file with mode: 0644]
arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al.dtsi [new file with mode: 0644]

index d00858cb14078129124623dc78aa9a48c186ce00..2be7245796328de1467eaad996fbb21f7976c4cf 100644 (file)
@@ -5,6 +5,8 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-oxalis.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-tqmls1012al-mbls1012al.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-tqmls1012al-mbls1012al-emmc.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-kbox-a-230-ls.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var1.dtb
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al-emmc.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al-emmc.dts
new file mode 100644 (file)
index 0000000..07026b0
--- /dev/null
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (c) 2018-2025 TQ-Systems GmbH <linux@ew.tq-group.com>,
+ * D-82229 Seefeld, Germany.
+ * Author: Matthias Schiffer
+ * Author: Max Merchel
+ */
+
+#include "fsl-ls1012a-tqmls1012al-mbls1012al.dts"
+
+&esdhc0 {
+       vqmmc-supply = <&reg_1v8>;
+       /delete-property/ no-mmc;
+       /delete-property/ sd-uhs-sdr12;
+       /delete-property/ sd-uhs-sdr25;
+       /delete-property/ sd-uhs-sdr50;
+       /delete-property/ sd-uhs-sdr104;
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+       no-sd;
+       voltage-ranges = <1800 1800>;
+       non-removable;
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al.dts
new file mode 100644 (file)
index 0000000..e46cc1a
--- /dev/null
@@ -0,0 +1,366 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (c) 2018-2025 TQ-Systems GmbH <linux@ew.tq-group.com>,
+ * D-82229 Seefeld, Germany.
+ * Author: Matthias Schiffer
+ * Author: Max Merchel
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/net/ti-dp83867.h>
+#include "fsl-ls1012a-tqmls1012al.dtsi"
+
+/ {
+       model = "TQ-Systems TQMLS1012AL on MBLS1012AL";
+       compatible = "tq,ls1012a-tqmls1012al-mbls1012al", "tq,ls1012a-tqmls1012al", "fsl,ls1012a";
+       chassis-type = "embedded";
+
+       aliases {
+               /* use MAC from U-Boot environment */
+               /* TODO: PFE */
+               ethernet2 = &swport0;
+               ethernet3 = &swport1;
+               ethernet4 = &swport2;
+               ethernet5 = &swport3;
+               serial0 = &duart0;
+               spi0 = &qspi;
+       };
+
+       chosen {
+               stdout-path = &duart0;
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+               autorepeat;
+
+               switch-1 {
+                       label = "S2";
+                       linux,code = <BTN_0>;
+                       gpios = <&gpio_exp_3p3v 13 GPIO_ACTIVE_LOW>;
+               };
+
+               switch-2 {
+                       label = "X15";
+                       linux,code = <BTN_1>;
+                       gpios = <&gpio_exp_1p8v 5 GPIO_ACTIVE_LOW>;
+               };
+
+               switch-3 {
+                       label = "X16";
+                       linux,code = <BTN_2>;
+                       gpios = <&gpio_exp_1p8v 4 GPIO_ACTIVE_LOW>;
+               };
+       };
+
+       gpio-leds {
+               compatible = "gpio-leds";
+
+               led-0 {
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_HEARTBEAT;
+                       gpios = <&gpio_exp_3p3v 14 GPIO_ACTIVE_LOW>;
+                       linux,default-trigger = "heartbeat";
+               };
+
+               led-1 {
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_STATUS;
+                       gpios = <&gpio_exp_3p3v 15 GPIO_ACTIVE_LOW>;
+                       linux,default-trigger = "default-on";
+               };
+       };
+
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               /* global autoconfigured region for contiguous allocations */
+               linux,cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* 64 MiB */
+                       size = <0 0x04000000>;
+                       /*  512 - 128 MiB, our minimum RAM config will be 512 MiB */
+                       alloc-ranges = <0 0x80000000 0 0x98000000>;
+                       linux,cma-default;
+               };
+       };
+
+       reg_1v5: regulator-1v5 {
+               compatible = "regulator-fixed";
+               regulator-name = "V_1V5";
+               regulator-min-microvolt = <1500000>;
+               regulator-max-microvolt = <1500000>;
+               regulator-always-on;
+       };
+
+       reg_1p5v_pcie: regulator-1p5v-pcie {
+               compatible = "regulator-fixed";
+               regulator-name = "V_1V5_PCIE";
+               regulator-min-microvolt = <1500000>;
+               regulator-max-microvolt = <1500000>;
+               regulator-always-on;
+               regulator-boot-on;
+               gpio = <&gpio_exp_1p8v 7 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               vin-supply = <&reg_1v5>;
+       };
+
+       reg_1p5v_wlan: regulator-1p5v-wlan {
+               compatible = "regulator-fixed";
+               regulator-name = "V_1V5_WLAN";
+               regulator-min-microvolt = <1500000>;
+               regulator-max-microvolt = <1500000>;
+               regulator-always-on;
+               regulator-boot-on;
+               gpio = <&gpio_exp_1p8v 6 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               vin-supply = <&reg_1v5>;
+       };
+
+       reg_1v8: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "V_1V8";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-always-on;
+       };
+
+       reg_3v3: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "3P3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
+       reg_3v3_pcie: regulator-3v3-pcie {
+               compatible = "regulator-fixed";
+               regulator-name = "V_3V3_PCIE";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+               regulator-boot-on;
+               gpio = <&gpio_exp_3p3v 3 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               vin-supply = <&reg_3v3>;
+       };
+
+       reg_3v3_wlan: regulator-3v3-wlan {
+               compatible = "regulator-fixed";
+               regulator-name = "V_3V3_WLAN";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+               regulator-boot-on;
+               gpio = <&gpio_exp_3p3v 1 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               vin-supply = <&reg_3v3>;
+       };
+};
+
+&duart0 {
+       status = "okay";
+};
+
+&esdhc0 {
+       vmmc-supply = <&reg_3v3>;
+       no-mmc;
+       no-sdio;
+       disable-wp;
+       sd-uhs-sdr12;
+       sd-uhs-sdr25;
+       sd-uhs-sdr50;
+       sd-uhs-sdr104;
+       status = "okay";
+};
+
+&i2c0 {
+       gpio_exp_3p3v: gpio@20 {
+               compatible = "nxp,pca9555";
+               reg = <0x20>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               vcc-supply = <&reg_3v3>;
+               interrupt-parent = <&gpio0>;
+               interrupts = <24 IRQ_TYPE_EDGE_FALLING>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               gpio-line-names = "", "", "GPIO_3V3_3", "",
+                                 "", "", "", "",
+                                 "", "GPIO_3V3_1", "GPIO_3V3_2", "",
+                                 "", "", "", "";
+
+               wlan-disable-hog {
+                       gpio-hog;
+                       gpios = <0 GPIO_ACTIVE_HIGH>;
+                       output-high;
+                       line-name = "WLAN_DISABLE#";
+               };
+
+               pcie-rst-hog {
+                       gpio-hog;
+                       gpios = <4 GPIO_ACTIVE_HIGH>;
+                       output-high;
+                       line-name = "PCIE_RST#";
+               };
+
+               wlan-rst-hog {
+                       gpio-hog;
+                       gpios = <5 GPIO_ACTIVE_HIGH>;
+                       output-high;
+                       line-name = "WLAN_RST#";
+               };
+
+               pcie-dis-hog {
+                       gpio-hog;
+                       gpios = <11 GPIO_ACTIVE_HIGH>;
+                       output-high;
+                       line-name = "PCIE_DIS#";
+               };
+
+               pcie-wake-hog {
+                       gpio-hog;
+                       gpios = <12 GPIO_ACTIVE_HIGH>;
+                       input;
+                       line-name = "PCIE_WAKE#";
+               };
+       };
+
+       lm75_48: temperature-sensor@48 {
+               compatible = "national,lm75a";
+               reg = <0x48>;
+               vs-supply = <&reg_3v3>;
+       };
+
+       switch@5f {
+               compatible = "microchip,ksz9897";
+               reg = <0x5f>;
+               reset-gpios = <&gpio_exp_3p3v 7 GPIO_ACTIVE_LOW>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       swport0: port@0 {
+                               reg = <0>;
+                               label = "swp0";
+                               phy-mode = "internal";
+                       };
+
+                       swport1: port@1 {
+                               reg = <1>;
+                               label = "swp1";
+                               phy-mode = "internal";
+                       };
+
+                       swport2: port@2 {
+                               reg = <2>;
+                               label = "swp2";
+                               phy-mode = "internal";
+                       };
+
+                       swport3: port@3 {
+                               reg = <3>;
+                               label = "swp3";
+                               phy-mode = "internal";
+                       };
+
+                       port@6 {
+                               reg = <6>;
+                               label = "cpu";
+                               /* TODO: PFE */
+                               phy-mode = "rgmii-id";
+                               rx-internal-delay-ps = <1500>;
+                               tx-internal-delay-ps = <1500>;
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+               };
+       };
+
+       gpio_exp_1p8v: gpio@70 {
+               compatible = "nxp,pca9538";
+               reg = <0x70>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               vcc-supply = <&reg_1v8>;
+               interrupt-parent = <&gpio0>;
+               interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               gpio-line-names = "PCIE_CLK_PD#", "PMIC_INT#", "ETH_SW_INT#", "",
+                                 "", "", "", "",
+                                 "", "GPIO_3V3_1", "GPIO_3V3_2", "",
+                                 "", "", "", "";
+
+               /* do not change PCIE_CLK_PD */
+               pcie-clk-pd-hog {
+                       gpio-hog;
+                       gpios = <0 GPIO_ACTIVE_HIGH>;
+                       output-high;
+                       line-name = "PCIE_CLK_PD#";
+               };
+
+               pmic-int-hog {
+                       gpio-hog;
+                       gpios = <1 GPIO_ACTIVE_HIGH>;
+                       input;
+                       line-name = "PMIC_INT#";
+               };
+
+               eth-sw-int-hog {
+                       gpio-hog;
+                       gpios = <2 GPIO_ACTIVE_HIGH>;
+                       input;
+                       line-name = "ETH_SW_INT#";
+               };
+
+               eth-link-pwrdwn-hog {
+                       gpio-hog;
+                       gpios = <3 GPIO_ACTIVE_HIGH>;
+                       input;
+                       line-name = "ETH_LINK_PWRDWN#";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+/* TODO: PFE */
+
+&sata {
+       status = "okay";
+};
+
+&usb0 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       hub_2_0: hub@1 {
+               compatible = "usb451,8142";
+               reg = <1>;
+               peer-hub = <&hub_3_0>;
+               reset-gpios = <&gpio_exp_3p3v 6 GPIO_ACTIVE_LOW>;
+               vdd-supply = <&reg_vcc_3v3>;
+       };
+
+       hub_3_0: hub@2 {
+               compatible = "usb451,8140";
+               reg = <2>;
+               peer-hub = <&hub_2_0>;
+               reset-gpios = <&gpio_exp_3p3v 6 GPIO_ACTIVE_LOW>;
+               vdd-supply = <&reg_vcc_3v3>;
+       };
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al.dtsi
new file mode 100644 (file)
index 0000000..7c5a3de
--- /dev/null
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (c) 2018-2025 TQ-Systems GmbH <linux@ew.tq-group.com>,
+ * D-82229 Seefeld, Germany.
+ * Author: Matthias Schiffer
+ * Author: Max Merchel
+ */
+
+#include "fsl-ls1012a.dtsi"
+
+/ {
+       compatible = "tq,ls1012a-tqmls1012al", "fsl,ls1012a";
+
+       memory@80000000 {
+               device_type = "memory";
+               /*  our minimum RAM config will be 512 MiB */
+               reg = <0x00000000 0x80000000 0 0x20000000>;
+       };
+
+       reg_vcc_1v8: regulator-1v8 {
+               compatible = "regulator-fixed";
+               regulator-name = "VCC_1V8";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+       };
+
+       reg_vcc_3v3: regulator-3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "VCC_3V3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+       };
+};
+
+&i2c0 {
+       status = "okay";
+
+       jc42_19: temperature-sensor@19 {
+               compatible = "nxp,se97b", "jedec,jc-42.4-temp";
+               reg = <0x19>;
+       };
+
+       m24c64_50: eeprom@50 {
+               compatible = "atmel,24c64";
+               reg = <0x50>;
+               pagesize = <32>;
+               vcc-supply = <&reg_vcc_3v3>;
+       };
+
+       m24c02_51: eeprom@51 {
+               compatible = "nxp,se97b", "atmel,24c02";
+               reg = <0x51>;
+               pagesize = <16>;
+               read-only;
+               vcc-supply = <&reg_vcc_3v3>;
+       };
+
+       rtc1: rtc@68 {
+               compatible = "dallas,ds1339";
+               reg = <0x68>;
+       };
+};
+
+&qspi {
+       status = "okay";
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <39000000>;
+               spi-rx-bus-width = <4>;
+               spi-tx-bus-width = <1>;
+               vcc-supply = <&reg_vcc_1v8>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+               };
+       };
+};