phy: qcom: qmp-combo: introduce QMPPHY_MODE

Introduce an enum for the QMP Combo PHY modes, use it in the
QMP commmon phy init function and default to COMBO mode.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
[konrad: some renaming and rewording]
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on Lenovo Thinkpad T14S
Link: https://lore.kernel.org/r/20250807-topic-4ln_dp_respin-v4-4-43272d6eca92@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 8395035754975808ee1b5b9c48d046a719e79e60..c65837fc9e4c38673fc61d3ae66072ba5a265a70 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -62,6 +62,12 @@
 
 #define PHY_INIT_COMPLETE_TIMEOUT              10000
 
+enum qmpphy_mode {
+       QMPPHY_MODE_USB3DP = 0,
+       QMPPHY_MODE_DP_ONLY,
+       QMPPHY_MODE_USB3_ONLY,
+};
+
 /* set of registers with offsets different per-PHY */
 enum qphy_reg_layout {
        /* PCS registers */
@@ -1844,6 +1850,7 @@ struct qmp_combo {
 
        struct mutex phy_mutex;
        int init_count;
+       enum qmpphy_mode qmpphy_mode;
 
        struct phy *usb_phy;
        enum phy_mode phy_mode;
@@ -3037,12 +3044,33 @@ static int qmp_combo_com_init(struct qmp_combo *qmp, bool force)
        if (qmp->orientation == TYPEC_ORIENTATION_REVERSE)
                val |= SW_PORTSELECT_VAL;
        writel(val, com + QPHY_V3_DP_COM_TYPEC_CTRL);
-       writel(USB3_MODE | DP_MODE, com + QPHY_V3_DP_COM_PHY_MODE_CTRL);
 
-       /* bring both QMP USB and QMP DP PHYs PCS block out of reset */
-       qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL,
-                       SW_DPPHY_RESET_MUX | SW_DPPHY_RESET |
-                       SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET);
+       switch (qmp->qmpphy_mode) {
+       case QMPPHY_MODE_USB3DP:
+               writel(USB3_MODE | DP_MODE, com + QPHY_V3_DP_COM_PHY_MODE_CTRL);
+
+               /* bring both QMP USB and QMP DP PHYs PCS block out of reset */
+               qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL,
+                               SW_DPPHY_RESET_MUX | SW_DPPHY_RESET |
+                               SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET);
+               break;
+
+       case QMPPHY_MODE_DP_ONLY:
+               writel(DP_MODE, com + QPHY_V3_DP_COM_PHY_MODE_CTRL);
+
+               /* bring QMP DP PHY PCS block out of reset */
+               qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL,
+                               SW_DPPHY_RESET_MUX | SW_DPPHY_RESET);
+               break;
+
+       case QMPPHY_MODE_USB3_ONLY:
+               writel(USB3_MODE, com + QPHY_V3_DP_COM_PHY_MODE_CTRL);
+
+               /* bring QMP USB PHY PCS block out of reset */
+               qphy_clrbits(com, QPHY_V3_DP_COM_RESET_OVRD_CTRL,
+                               SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET);
+               break;
+       }
 
        qphy_clrbits(com, QPHY_V3_DP_COM_SWI_CTRL, 0x03);
        qphy_clrbits(com, QPHY_V3_DP_COM_SW_RESET, SW_RESET);
@@ -4053,6 +4081,12 @@ static int qmp_combo_probe(struct platform_device *pdev)
        if (ret)
                goto err_node_put;
 
+       /*
+        * The hw default is USB3_ONLY, but USB3+DP mode lets us more easily
+        * check both sub-blocks' init tables for blunders at probe time.
+        */
+       qmp->qmpphy_mode = QMPPHY_MODE_USB3DP;
+
        qmp->usb_phy = devm_phy_create(dev, usb_np, &qmp_combo_usb_phy_ops);
        if (IS_ERR(qmp->usb_phy)) {
                ret = PTR_ERR(qmp->usb_phy);