struct intel_display *display = to_intel_display(state);
struct intel_bw_state *new_bw_state = NULL;
const struct intel_bw_state *old_bw_state = NULL;
- const struct intel_cdclk_state *cdclk_state;
const struct intel_crtc_state *old_crtc_state;
const struct intel_crtc_state *new_crtc_state;
- int old_min_cdclk, new_min_cdclk;
struct intel_crtc *crtc;
- int i;
+ int ret, i;
if (DISPLAY_VER(display) < 9)
return 0;
return ret;
}
- old_min_cdclk = intel_bw_min_cdclk(display, old_bw_state);
- new_min_cdclk = intel_bw_min_cdclk(display, new_bw_state);
-
- /*
- * No need to check against the cdclk state if
- * the min cdclk doesn't increase.
- *
- * Ie. we only ever increase the cdclk due to bandwidth
- * requirements. This can reduce back and forth
- * display blinking due to constant cdclk changes.
- */
- if (new_min_cdclk <= old_min_cdclk)
- return 0;
-
- cdclk_state = intel_atomic_get_cdclk_state(state);
- if (IS_ERR(cdclk_state))
- return PTR_ERR(cdclk_state);
-
- /*
- * No need to recalculate the cdclk state if
- * the min cdclk doesn't increase.
- *
- * Ie. we only ever increase the cdclk due to bandwidth
- * requirements. This can reduce back and forth
- * display blinking due to constant cdclk changes.
- */
- if (new_min_cdclk <= intel_cdclk_bw_min_cdclk(cdclk_state))
- return 0;
-
- drm_dbg_kms(display->drm,
- "new bandwidth min cdclk (%d kHz) > old min cdclk (%d kHz)\n",
- new_min_cdclk, intel_cdclk_bw_min_cdclk(cdclk_state));
- *need_cdclk_calc = true;
+ ret = intel_cdclk_update_bw_min_cdclk(state,
+ intel_bw_min_cdclk(display, old_bw_state),
+ intel_bw_min_cdclk(display, new_bw_state),
+ need_cdclk_calc);
+ if (ret)
+ return ret;
return 0;
}
return min_cdclk;
}
+int intel_cdclk_update_bw_min_cdclk(struct intel_atomic_state *state,
+ int old_min_cdclk, int new_min_cdclk,
+ bool *need_cdclk_calc)
+{
+ struct intel_display *display = to_intel_display(state);
+ struct intel_cdclk_state *cdclk_state;
+
+ if (new_min_cdclk <= old_min_cdclk)
+ return 0;
+
+ cdclk_state = intel_atomic_get_cdclk_state(state);
+ if (IS_ERR(cdclk_state))
+ return PTR_ERR(cdclk_state);
+
+ old_min_cdclk = cdclk_state->bw_min_cdclk;
+
+ if (new_min_cdclk <= old_min_cdclk)
+ return 0;
+
+ *need_cdclk_calc = true;
+
+ drm_dbg_kms(display->drm,
+ "bandwidth min cdclk: %d kHz -> %d kHz\n",
+ old_min_cdclk, new_min_cdclk);
+
+ return 0;
+}
+
static bool glk_cdclk_audio_wa_needed(struct intel_display *display,
const struct intel_cdclk_state *cdclk_state)
{
intel_atomic_get_cdclk_state(struct intel_atomic_state *state);
void intel_cdclk_update_hw_state(struct intel_display *display);
void intel_cdclk_crtc_disable_noatomic(struct intel_crtc *crtc);
+int intel_cdclk_update_bw_min_cdclk(struct intel_atomic_state *state,
+ int old_min_cdclk, int new_min_cdclk,
+ bool *need_cdclk_calc);
#define to_intel_cdclk_state(global_state) \
container_of_const((global_state), struct intel_cdclk_state, base)