drm/xe: Add has_ctx_tlb_inval to device info

Add has_ctx_tlb_inval to device info indicating a device has context
basd TLB invalidation.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
Tested-by: Stuart Summers <stuart.summers@intel.com>
Link: https://patch.msgid.link/20260116221731.868657-4-matthew.brost@intel.com

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index f689766adcb14ade6aa19e6788c8d15a610d63cd..72453206267bbf9f6be57ce6ca343c5be578d7cd 100644 (file)
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -353,6 +353,8 @@ struct xe_device {
                u8 has_pre_prod_wa:1;
                /** @info.has_pxp: Device has PXP support */
                u8 has_pxp:1;
+               /** @info.has_ctx_tlb_inval: Has context based TLB invalidations */
+               u8 has_ctx_tlb_inval:1;
                /** @info.has_range_tlb_inval: Has range based TLB invalidations */
                u8 has_range_tlb_inval:1;
                /** @info.has_soc_remapper_sysctrl: Has SoC remapper system controller */

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index c000c25b5af9447eba57fdba1a574121d221a82f..f367479fe3fb0c7fc28469ee51f73f221b328721 100644 (file)
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -893,6 +893,7 @@ static int xe_info_init(struct xe_device *xe,
                xe->info.has_device_atomics_on_smem = 1;
 
        xe->info.has_range_tlb_inval = graphics_desc->has_range_tlb_inval;
+       xe->info.has_ctx_tlb_inval = graphics_desc->has_ctx_tlb_inval;
        xe->info.has_usm = graphics_desc->has_usm;
        xe->info.has_64bit_timestamp = graphics_desc->has_64bit_timestamp;
 

diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index 20acc5349ee6dae4a4ca66483398f7dbf861fad2..7ccb0ab7a53bf8cac6c5ac80716c30a384645fc4 100644 (file)
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -72,6 +72,7 @@ struct xe_graphics_desc {
        u8 has_atomic_enable_pte_bit:1;
        u8 has_indirect_ring_state:1;
        u8 has_range_tlb_inval:1;
+       u8 has_ctx_tlb_inval:1;
        u8 has_usm:1;
        u8 has_64bit_timestamp:1;
 };