AARCH64_FUSION_PAIR ("cmp+cset", CMP_CSET)
#undef AARCH64_FUSION_PAIR
+
+/* Baseline fusion settings suitable for all cores. */
+#define AARCH64_FUSE_BASE (AARCH64_FUSE_CMP_BRANCH | AARCH64_FUSE_AES_AESMC)
+
+#define AARCH64_FUSE_MOVK (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_MOVK_MOVK)
4 /* store_pred. */
}, /* memmov_cost. */
7, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops */
+ AARCH64_FUSE_BASE, /* fusible_ops */
"32", /* function_align. */
"16", /* jump_align. */
"32", /* loop_align. */
4 /* store_pred. */
}, /* memmov_cost. */
4, /* issue_rate */
- (AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_AES_AESMC |
- AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_MOVK_MOVK |
- AARCH64_FUSE_ALU_BRANCH /* adds, ands, bics, ccmp, ccmn */ |
- AARCH64_FUSE_CMP_BRANCH),
- /* fusible_ops */
+ (AARCH64_FUSE_BASE | AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_MOVK
+ | AARCH64_FUSE_ALU_BRANCH), /* fusible_ops */
"32", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
4 /* store_pred. */
}, /* memmov_cost. */
4, /* issue_rate */
- (AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_AES_AESMC |
- AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_MOVK_MOVK |
- AARCH64_FUSE_ALU_BRANCH /* adds, ands, bics, ccmp, ccmn */ |
- AARCH64_FUSE_CMP_BRANCH | AARCH64_FUSE_ALU_CBZ |
- AARCH64_FUSE_ADDSUB_2REG_CONST1),
- /* fusible_ops */
+ (AARCH64_FUSE_BASE | AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_MOVK
+ | AARCH64_FUSE_ALU_BRANCH | AARCH64_FUSE_ALU_CBZ
+ | AARCH64_FUSE_ADDSUB_2REG_CONST1), /* fusible_ops */
"32", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
4 /* store_pred. */
}, /* memmov_cost. */
4, /* issue_rate */
- (AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_AES_AESMC |
- AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_MOVK_MOVK |
- AARCH64_FUSE_ALU_BRANCH /* adds, ands, bics, ccmp, ccmn */ |
- AARCH64_FUSE_CMP_BRANCH | AARCH64_FUSE_ALU_CBZ |
- AARCH64_FUSE_ADDSUB_2REG_CONST1),
- /* fusible_ops */
+ (AARCH64_FUSE_BASE | AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_MOVK
+ | AARCH64_FUSE_ALU_BRANCH | AARCH64_FUSE_ALU_CBZ
+ | AARCH64_FUSE_ADDSUB_2REG_CONST1), /* fusible_ops */
"32", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
4 /* store_pred. */
}, /* memmov_cost. */
1, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
- | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */
+ (AARCH64_FUSE_BASE | AARCH64_FUSE_MOVK | AARCH64_FUSE_ADRP_ADD
+ | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */
"16", /* function_align. */
"4", /* jump_align. */
"8", /* loop_align. */
4 /* store_pred. */
}, /* memmov_cost. */
2, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
- | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */
+ (AARCH64_FUSE_BASE | AARCH64_FUSE_MOVK | AARCH64_FUSE_ADRP_ADD
+ | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */
"16", /* function_align. */
"4", /* jump_align. */
"8", /* loop_align. */
4 /* store_pred. */
}, /* memmov_cost. */
3, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
- | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops */
+ (AARCH64_FUSE_BASE | AARCH64_FUSE_MOVK | AARCH64_FUSE_ADRP_ADD), /* fusible_ops */
"16", /* function_align. */
"4", /* jump_align. */
"8", /* loop_align. */
4 /* store_pred. */
}, /* memmov_cost. */
3, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
- | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops */
+ (AARCH64_FUSE_BASE | AARCH64_FUSE_MOVK | AARCH64_FUSE_ADRP_ADD), /* fusible_ops */
"16", /* function_align. */
"4", /* jump_align. */
"8", /* loop_align. */
4 /* store_pred. */
}, /* memmov_cost. */
2, /* issue_rate. */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
- | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */
+ (AARCH64_FUSE_BASE | AARCH64_FUSE_MOVK | AARCH64_FUSE_ADRP_ADD
+ | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */
"16", /* function_align. */
"4", /* jump_align. */
"8", /* loop_align. */
2 /* store_pred. */
}, /* memmov_cost. */
10, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops */
+ AARCH64_FUSE_BASE, /* fusible_ops */
"32:16", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
AARCH64_LDP_STP_POLICY_ALWAYS /* stp_policy_model. */
};
-#endif /* GCC_AARCH64_H_CORTEXX925. */
\ No newline at end of file
+#endif /* GCC_AARCH64_H_CORTEXX925. */
4 /* store_pred. */
}, /* memmov_cost. */
3, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC), /* fusible_ops */
+ AARCH64_FUSE_BASE, /* fusible_ops */
"4", /* function_align. */
"4", /* jump_align. */
"4", /* loop_align. */
1 /* store_pred. */
}, /* memmov_cost. */
3, /* issue_rate. */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops. */
+ AARCH64_FUSE_BASE, /* fusible_ops. */
"32:16", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
4 /* store_pred. */
}, /* memmov_cost. */
2, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops */
+ AARCH64_FUSE_BASE, /* fusible_ops */
"16:12", /* function_align. */
"4", /* jump_align. */
"8", /* loop_align. */
4 /* store_pred. */
}, /* memmov_cost. */
3, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops */
+ AARCH64_FUSE_BASE, /* fusible_ops */
"32:16", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
1 /* store_pred. */
}, /* memmov_cost. */
3, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops */
+ AARCH64_FUSE_BASE, /* fusible_ops */
"32:16", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
1 /* store_pred. */
}, /* memmov_cost. */
3, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops */
+ AARCH64_FUSE_BASE, /* fusible_ops */
"32:16", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
4 /* store_pred. */
}, /* memmov_cost. */
3, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops */
+ AARCH64_FUSE_BASE, /* fusible_ops */
"32:16", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
1 /* store_pred. */
}, /* memmov_cost. */
5, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops */
+ AARCH64_FUSE_BASE, /* fusible_ops */
"32:16", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
AARCH64_LDP_STP_POLICY_ALWAYS /* stp_policy_model. */
};
-#endif /* GCC_AARCH64_H_NEOVERSEN2. */
\ No newline at end of file
+#endif /* GCC_AARCH64_H_NEOVERSEN2. */
2 /* store_pred. */
}, /* memmov_cost. */
5, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops */
+ AARCH64_FUSE_BASE, /* fusible_ops */
"32:16", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
AARCH64_LDP_STP_POLICY_ALWAYS /* stp_policy_model. */
};
-#endif /* GCC_AARCH64_H_NEOVERSEN3. */
\ No newline at end of file
+#endif /* GCC_AARCH64_H_NEOVERSEN3. */
1 /* store_pred. */
}, /* memmov_cost. */
3, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops */
+ AARCH64_FUSE_BASE, /* fusible_ops */
"32:16", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
2 /* store_pred. */
}, /* memmov_cost. */
5, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC
- | AARCH64_FUSE_CMP_BRANCH
- | AARCH64_FUSE_CMP_CSEL
- | AARCH64_FUSE_CMP_CSET), /* fusible_ops */
+ (AARCH64_FUSE_BASE | AARCH64_FUSE_CMP_CSEL | AARCH64_FUSE_CMP_CSET), /* fusible_ops */
"32:16", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
2 /* store_pred. */
}, /* memmov_cost. */
10, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops */
+ AARCH64_FUSE_BASE, /* fusible_ops */
"32:16", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
AARCH64_LDP_STP_POLICY_ALWAYS /* stp_policy_model. */
};
-#endif /* GCC_AARCH64_H_NEOVERSEV3. */
\ No newline at end of file
+#endif /* GCC_AARCH64_H_NEOVERSEV3. */
2 /* store_pred. */
}, /* memmov_cost. */
10, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_CMP_BRANCH), /* fusible_ops */
+ AARCH64_FUSE_BASE, /* fusible_ops */
"32:16", /* function_align. */
"4", /* jump_align. */
"32:16", /* loop_align. */
AARCH64_LDP_STP_POLICY_ALWAYS /* stp_policy_model. */
};
-#endif /* GCC_AARCH64_H_NEOVERSEV3AE. */
\ No newline at end of file
+#endif /* GCC_AARCH64_H_NEOVERSEV3AE. */
4 /* store_pred. */
}, /* memmov_cost. */
4, /* issue_rate */
- (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
- | AARCH64_FUSE_MOVK_MOVK), /* fuseable_ops */
+ (AARCH64_FUSE_MOVK | AARCH64_FUSE_ADRP_ADD), /* fuseable_ops */
"16", /* function_align. */
"8", /* jump_align. */
"16", /* loop_align. */
4 /* store_pred. */
}, /* memmov_cost. */
4, /* issue_rate */
- (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
- | AARCH64_FUSE_MOVK_MOVK), /* fuseable_ops */
+ (AARCH64_FUSE_MOVK | AARCH64_FUSE_ADRP_ADD), /* fuseable_ops */
"16", /* function_align. */
"8", /* jump_align. */
"16", /* loop_align. */
4 /* store_pred. */
}, /* memmov_cost. */
4, /* issue_rate. */
- (AARCH64_FUSE_ALU_BRANCH | AARCH64_FUSE_AES_AESMC
+ (AARCH64_FUSE_BASE | AARCH64_FUSE_ALU_BRANCH
| AARCH64_FUSE_ALU_CBZ), /* fusible_ops */
"16", /* function_align. */
"8", /* jump_align. */
4 /* store_pred. */
}, /* memmov_cost. */
6, /* issue_rate. */
- (AARCH64_FUSE_ALU_BRANCH | AARCH64_FUSE_AES_AESMC
+ (AARCH64_FUSE_BASE | AARCH64_FUSE_ALU_BRANCH
| AARCH64_FUSE_ALU_CBZ), /* fusible_ops */
"16", /* function_align. */
"8", /* jump_align. */
4 /* store_pred. */
}, /* memmov_cost. */
4, /* issue_rate */
- (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_ALU_BRANCH
+ (AARCH64_FUSE_BASE | AARCH64_FUSE_ALU_BRANCH
| AARCH64_FUSE_ALU_CBZ), /* fusible_ops */
"16", /* function_align. */
"4", /* jump_align. */