Just wire up old gem config for zynq.
Signed-off-by: Michal Simek <monstr@monstr.eu>
PLATFORM_RELFLAGS += -fno-strict-aliasing
# Xilinx, added to prevent unaligned accesses which started happening # with GCC 4.5.2 tools
PLATFORM_RELFLAGS += -mno-unaligned-access
+
+PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/xilinx/common
LIB = $(obj)lib$(BOARD).o
-COBJS-y := board.o
+COBJS-y := board.o ../common/xbasic_types.o
SOBJS := lowlevel_init.o
COBJS := $(sort $(COBJS-y))
#define dmbp() __asm__ __volatile__ ("dmb" : : : "memory")
-static void XIo_Out32(u32 OutAddress, u32 Value)
+void XIo_Out32(u32 OutAddress, u32 Value)
{
*(volatile u32 *) OutAddress = Value;
dmbp();
}
-static u32 XIo_In32(u32 InAddress)
+u32 XIo_In32(u32 InAddress)
{
volatile u32 temp = *(volatile u32 *)InAddress;
dmbp();
* The configuration table for emacps device
*/
-XEmacPss_Config XEmacPss_ConfigTable[XPAR_XEMACPSS_NUM_INSTANCES] = {
+XEmacPss_Config XEmacPss_ConfigTable[2] = {
{
- XPAR_XEMACPSS_0_DEVICE_ID, /* Device ID */
- XPAR_XEMACPSS_0_BASEADDR /* Device base address */
+ 0, /* Device ID */
+ 0xe000b000 /* Device base address */
},
{
- XPAR_XEMACPSS_1_DEVICE_ID, /* Device ID */
- XPAR_XEMACPSS_1_BASEADDR /* Device base address */
+ 1, /* Device ID */
+ 0xe000c000 /* Device base address */
}
};
XEmacPss_Config *CfgPtr = NULL;
int i;
- for (i = 0; i < XPAR_XEMACPSS_NUM_INSTANCES; i++) {
+ for (i = 0; i < 2; i++) {
if (XEmacPss_ConfigTable[i].DeviceId == DeviceId) {
CfgPtr = &XEmacPss_ConfigTable[i];
break;
return 0;
}
-int zynq_gem_initialize(bd_t *bis)
+int zynq_gem_initialize_old(bd_t *bis)
{
struct eth_device *dev;
dev = malloc(sizeof(*dev));
#define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
#define CONFIG_ZYNQ_SERIAL_UART0
-#define CONFIG_ZYNQ_GEM0
#define CONFIG_PHY_ADDR 23
+#define CONFIG_ZYNQ_GEM_OLD
+#define CONFIG_XGMAC_PHY_ADDR CONFIG_PHY_ADDR
+#define CONFIG_SYS_ENET
+
#define CONFIG_CPU_FREQ_HZ 12500000
#define CONFIG_MMC
#define PHYS_SDRAM_1_SIZE (1024 * 1024 * 1024)
#define CONFIG_ZYNQ_SERIAL_UART1
-#define CONFIG_ZYNQ_GEM0
#define CONFIG_PHY_ADDR 7
+#define CONFIG_ZYNQ_GEM_OLD
+#define CONFIG_XGMAC_PHY_ADDR CONFIG_PHY_ADDR
+#define CONFIG_SYS_ENET
+
+
#define CONFIG_SYS_NO_FLASH
#define CONFIG_MMC
#if defined(CONFIG_ZC770_XM010)
# define CONFIG_ZYNQ_SERIAL_UART1
-# define CONFIG_ZYNQ_GEM0
# define CONFIG_PHY_ADDR 7
+
+#define CONFIG_ZYNQ_GEM_OLD
+#define CONFIG_XGMAC_PHY_ADDR CONFIG_PHY_ADDR
+#define CONFIG_SYS_ENET
+
# define CONFIG_MMC
# define CONFIG_ZYNQ_SPI
#elif defined(CONFIG_ZC770_XM013)
# define CONFIG_ZYNQ_SERIAL_UART0
-# define CONFIG_ZYNQ_GEM1
-# define CONFIG_PHY_ADDR 7
+# define CONFIG_PHY_ADDR 7
+
+#define CONFIG_ZYNQ_GEM_OLD
+#define CONFIG_XGMAC_PHY_ADDR CONFIG_PHY_ADDR
+#define CONFIG_SYS_ENET
+
# define CONFIG_ZYNQ_SPI
#else
#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
#define CONFIG_ZYNQ_SERIAL_UART1
-#define CONFIG_ZYNQ_GEM0
#define CONFIG_PHY_ADDR 0
+#define CONFIG_ZYNQ_GEM_OLD
+#define CONFIG_XGMAC_PHY_ADDR CONFIG_PHY_ADDR
+#define CONFIG_SYS_ENET
+
#define CONFIG_SYS_NO_FLASH
#define CONFIG_MMC