Changes in shared code that don't affect open-vm-tools functionality.

Signed-off-by: Marcelo Vanzin <mvanzin@vmware.com>

diff --git a/open-vm-tools/lib/include/vm_atomic.h b/open-vm-tools/lib/include/vm_atomic.h
index 3e92754f85981d9bbd1c88bd4499a6da9327634d..ceb72c4180dbe30e6c3f88217e9661149771d174 100644 (file)
--- a/open-vm-tools/lib/include/vm_atomic.h
+++ b/open-vm-tools/lib/include/vm_atomic.h
@@ -121,6 +121,7 @@ __int64  _InterlockedCompareExchange64(__int64 volatile*, __int64, __int64);
 #endif
 #endif /* _MSC_VER */
 
+#if defined(__arm__) && !defined(FAKE_ATOMIC)
 /*
  * LDREX without STREX or CLREX may cause problems in environments where the
  * context switch may not clear the reference monitor - according ARM manual
@@ -128,7 +129,6 @@ __int64  _InterlockedCompareExchange64(__int64 volatile*, __int64, __int64);
  * may not like Linux kernel's non-preemptive context switch path. So use of
  * ARM routines in kernel code may not be safe.
  */
-#ifdef __arm__
 #   if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) ||  \
        defined(__ARM_ARCH_7R__)|| defined(__ARM_ARCH_7M__)
 #      define VM_ARM_V7
@@ -368,7 +368,11 @@ static INLINE uint32
 Atomic_ReadWrite(Atomic_uint32 *var, // IN
                  uint32 val)         // IN
 {
-#ifdef __GNUC__
+#ifdef FAKE_ATOMIC
+   uint32 retval = var->value;
+   var->value = val;
+   return retval;
+#elif defined(__GNUC__)
 #ifdef VM_ARM_V7
    register volatile uint32 retVal;
    register volatile uint32 res;
@@ -441,7 +445,14 @@ Atomic_ReadIfEqualWrite(Atomic_uint32 *var, // IN
                         uint32 oldVal,      // IN
                         uint32 newVal)      // IN
 {
-#ifdef __GNUC__
+#ifdef FAKE_ATOMIC
+   uint32 readVal = var->value;
+
+   if (oldVal == readVal) {
+     var->value = newVal;
+   }
+   return oldVal;
+#elif defined(__GNUC__)
 #ifdef VM_ARM_V7
    register uint32 retVal;
    register uint32 res;
@@ -593,7 +604,9 @@ static INLINE void
 Atomic_And(Atomic_uint32 *var, // IN
            uint32 val)         // IN
 {
-#ifdef __GNUC__
+#ifdef FAKE_ATOMIC
+   var->value &= val;
+#elif defined(__GNUC__)
 #ifdef VM_ARM_V7
    register volatile uint32 res;
    register volatile uint32 tmp;
@@ -657,7 +670,9 @@ static INLINE void
 Atomic_Or(Atomic_uint32 *var, // IN
           uint32 val)         // IN
 {
-#ifdef __GNUC__
+#ifdef FAKE_ATOMIC
+   var->value |= val;
+#elif defined(__GNUC__)
 #ifdef VM_ARM_V7
    register volatile uint32 res;
    register volatile uint32 tmp;
@@ -721,7 +736,9 @@ static INLINE void
 Atomic_Xor(Atomic_uint32 *var, // IN
            uint32 val)         // IN
 {
-#ifdef __GNUC__
+#ifdef FAKE_ATOMIC
+   var->value ^= val;
+#elif defined(__GNUC__)
 #ifdef VM_ARM_V7
    register volatile uint32 res;
    register volatile uint32 tmp;
@@ -824,7 +841,9 @@ static INLINE void
 Atomic_Add(Atomic_uint32 *var, // IN
            uint32 val)         // IN
 {
-#ifdef __GNUC__
+#ifdef FAKE_ATOMIC
+   var->value += val;
+#elif defined(__GNUC__)
 #ifdef VM_ARM_V7
    register volatile uint32 res;
    register volatile uint32 tmp;
@@ -927,7 +946,9 @@ static INLINE void
 Atomic_Sub(Atomic_uint32 *var, // IN
            uint32 val)         // IN
 {
-#ifdef __GNUC__
+#ifdef FAKE_ATOMIC
+   var->value -= val;
+#elif defined(__GNUC__)
 #ifdef VM_ARM_V7
    register volatile uint32 res;
    register volatile uint32 tmp;
@@ -1030,7 +1051,7 @@ static INLINE void
 Atomic_Inc(Atomic_uint32 *var) // IN
 {
 #ifdef __GNUC__
-#ifdef VM_ARM_V7
+#if defined(VM_ARM_V7) || defined(FAKE_ATOMIC)
    Atomic_Add(var, 1);
 #else // VM_ARM_V7
    /* Checked against the Intel manual and GCC --walken */
@@ -1076,7 +1097,7 @@ static INLINE void
 Atomic_Dec(Atomic_uint32 *var) // IN
 {
 #ifdef __GNUC__
-#ifdef VM_ARM_V7
+#if defined(VM_ARM_V7) || defined(FAKE_ATOMIC)
    Atomic_Sub(var, 1);
 #else // VM_ARM_V7
    /* Checked against the Intel manual and GCC --walken */
@@ -1258,7 +1279,11 @@ static INLINE uint32
 Atomic_FetchAndAddUnfenced(Atomic_uint32 *var, // IN
                            uint32 val)         // IN
 {
-#ifdef __GNUC__
+#ifdef FAKE_ATOMIC
+   uint32 res = var->value;
+   var->value = res + val;
+   return res;
+#elif defined(__GNUC__)
 #ifdef VM_ARM_V7
    register volatile uint32 res;
    register volatile uint32 retVal;
@@ -1337,7 +1362,7 @@ static INLINE uint32
 Atomic_FetchAndAdd(Atomic_uint32 *var, // IN
                    uint32 val)         // IN
 {
-#if defined(__GNUC__) && !defined(VM_ARM_V7)
+#if defined(__GNUC__) && !defined(VM_ARM_V7) && !defined(FAKE_ATOMIC)
    val = Atomic_FetchAndAddUnfenced(var, val);
    AtomicEpilogue();
    return val;
@@ -1560,8 +1585,14 @@ Atomic_CMPXCHG64(Atomic_uint64 *var,   // IN/OUT
                  uint64 const *oldVal, // IN
                  uint64 const *newVal) // IN
 {
-#ifdef __GNUC__
+#ifdef FAKE_ATOMIC
+   uint64 readVal = var->value;
 
+   if (*oldVal == readVal) {
+     var->value = *newVal;
+   }
+   return (*oldVal == readVal);
+#elif defined(__GNUC__)
 #if defined(VM_ARM_V7)
    return (Atomic_ReadIfEqualWrite64(var, *oldVal, *newVal) == *oldVal);
 
@@ -1724,7 +1755,14 @@ Atomic_CMPXCHG32(Atomic_uint32 *var,   // IN/OUT
                  uint32 oldVal, // IN
                  uint32 newVal) // IN
 {
-#ifdef __GNUC__
+#ifdef FAKE_ATOMIC
+   uint32 readVal = var->value;
+
+   if (oldVal == readVal) {
+     var->value = newVal;
+   }
+   return (oldVal == readVal);
+#elif defined(__GNUC__)
 #ifdef VM_ARM_V7
    return (Atomic_ReadIfEqualWrite(var, oldVal, newVal) == oldVal);
 #else // VM_ARM_V7
@@ -1769,7 +1807,9 @@ Atomic_CMPXCHG32(Atomic_uint32 *var,   // IN/OUT
 static INLINE uint64
 Atomic_Read64(Atomic_uint64 const *var) // IN
 {
-#if defined(__GNUC__) && defined(__x86_64__)
+#ifdef FAKE_ATOMIC
+   return var->value;
+#elif defined(__GNUC__) && defined(__x86_64__)
    uint64 value;
 
 #ifdef VMM

diff --git a/open-vm-tools/lib/include/vm_basic_asm.h b/open-vm-tools/lib/include/vm_basic_asm.h
index b47c94d2fa194a29f77c6a98562ba6fac8b12e61..d253a9bf58c83e2a7c2a9282b97dae4d7a19e0c0 100644 (file)
--- a/open-vm-tools/lib/include/vm_basic_asm.h
+++ b/open-vm-tools/lib/include/vm_basic_asm.h
@@ -740,7 +740,8 @@ Bswap16(uint16 v)
 static INLINE uint32
 Bswap32(uint32 v) // IN
 {
-#if defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__)) || defined(__arm__) // {
+#if defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__)) || \
+   (defined(__arm__) && !defined(__ANDROID__))  // {
 #ifdef __arm__
     __asm__("rev %0, %0" : "+r"(v));
     return v;