]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: renesas: Add initial support for RZ/G3L SMARC SoM
authorBiju Das <biju.das.jz@bp.renesas.com>
Tue, 24 Mar 2026 11:43:14 +0000 (11:43 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 26 Mar 2026 18:56:24 +0000 (19:56 +0100)
Add initial support for the RZ/G3L SMARC SoM with 2GiB memory and
extal clk.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20260324114329.268249-10-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi [new file with mode: 0644]

diff --git a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
new file mode 100644 (file)
index 0000000..ab49506
--- /dev/null
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for R9A08G046L48 SMARC SoM board.
+ *
+ * Copyright (C) 2026 Renesas Electronics Corp.
+ */
+
+/ {
+       compatible = "renesas,rzg3l-smarcm", "renesas,r9a08g046l48", "renesas,r9a08g046";
+
+       memory@48000000 {
+               device_type = "memory";
+               /* First 128MiB is reserved for secure area. */
+               reg = <0x0 0x48000000 0x0 0x78000000>;
+       };
+};
+
+&extal_clk {
+       clock-frequency = <24000000>;
+};