Since
r16-5947-ga6c50ec2c6ebcb, gcc no longer uses a register for the
stack offset. Adjust the expected assembler to use sp directly instead.
r16-5946-g83739ee76da65d produces:
stacktest1:
sub sp, sp, #8
add r3, sp, #6
strh r0, [r3] @ __bf16
ldrh r0, [sp, #6] @ __bf16
add sp, sp, #8
bx lr
r16-5947-ga6c50ec2c6ebcb produces:
stacktest1:
sub sp, sp, #8
strh r0, [sp, #6] @ __bf16
ldrh r0, [sp, #6] @ __bf16
add sp, sp, #8
bx lr
gcc/testsuite/ChangeLog:
* gcc.target/arm/bfloat16_scalar_1_2.c: Adjust assembler to
match compiler.
* gcc.target/arm/bfloat16_scalar_2_2.c: Likewise.
* gcc.target/arm/bfloat16_scalar_3_2.c: Likewise.
* gcc.target/arm/bfloat16_simd_1_2.c: Likewise.
* gcc.target/arm/bfloat16_simd_2_2.c: Likewise.
* gcc.target/arm/bfloat16_simd_3_2.c: Likewise.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
/*
**stacktest1:
** ...
-** strh r[0-9]+, \[r[0-9]+\] @ __bf16
-** ldrh r[0-9]+, \[sp, #[0-9]+\] @ __bf16
+** strh r[0-9]+, (\[sp, #[0-9]+\]) @ __bf16
+** ldrh r[0-9]+, \1 @ __bf16
** ...
** bx lr
*/
/*
**stacktest1:
** ...
-** strh r[0-9]+, \[r[0-9]+\] @ __bf16
-** ldrh r[0-9]+, \[sp, #[0-9]+\] @ __bf16
+** strh r[0-9]+, (\[sp, #[0-9]+\]) @ __bf16
+** ldrh r[0-9]+, \1 @ __bf16
** ...
** bx lr
*/
/*
**stacktest1:
** ...
-** strh r[0-9]+, \[r[0-9]+\] @ __bf16
-** ldrh r[0-9]+, \[sp, #[0-9]+\] @ __bf16
+** strh r[0-9]+, (\[sp, #[0-9]+\]) @ __bf16
+** ldrh r[0-9]+, \1 @ __bf16
** ...
** bx lr
*/
/*
**stacktest1:
** ...
-** strh r[0-9]+, \[r[0-9]+\] @ __bf16
-** ldrh r[0-9]+, \[sp, #[0-9]+\] @ __bf16
+** strh r[0-9]+, (\[sp, #[0-9]+\]) @ __bf16
+** ldrh r[0-9]+, \1 @ __bf16
** ...
** bx lr
*/
/*
**stacktest1:
** ...
-** strh r[0-9]+, \[r[0-9]+\] @ __bf16
-** ldrh r[0-9]+, \[sp, #[0-9]+\] @ __bf16
+** strh r[0-9]+, (\[sp, #[0-9]+\]) @ __bf16
+** ldrh r[0-9]+, \1 @ __bf16
** ...
** bx lr
*/
/*
**stacktest1:
** ...
-** strh r[0-9]+, \[r[0-9]+\] @ __bf16
-** ldrh r[0-9]+, \[sp, #[0-9]+\] @ __bf16
+** strh r[0-9]+, (\[sp, #[0-9]+\]) @ __bf16
+** ldrh r[0-9]+, \1 @ __bf16
** ...
** bx lr
*/