]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/display: Aux Enable and Display powerwell timeouts
authorSuraj Kandpal <suraj.kandpal@intel.com>
Sat, 1 Nov 2025 03:25:12 +0000 (08:55 +0530)
committerSuraj Kandpal <suraj.kandpal@intel.com>
Sat, 1 Nov 2025 03:34:24 +0000 (09:04 +0530)
From XE3P we can now poll if the AUX power is up or down define the
timeouts for each respectively.

Bspec: 68967
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patch.msgid.link/20251101032513.4171255-25-suraj.kandpal@intel.com
drivers/gpu/drm/i915/display/intel_display_power_well.c

index 5e88b930f5aaecddbe12e70f0dce27dcedc77ef0..e1d45ef0eedd5e72146a56f352d1318cb29f6abd 100644 (file)
@@ -1864,18 +1864,36 @@ static void xelpdp_aux_power_well_enable(struct intel_display *display,
         * expected to just wait a fixed 600us after raising the request
         * bit.
         */
-       usleep_range(600, 1200);
+       if (DISPLAY_VER(display) >= 35) {
+               if (intel_de_wait_for_set(display, XELPDP_DP_AUX_CH_CTL(display, aux_ch),
+                                         XELPDP_DP_AUX_CH_CTL_POWER_STATUS, 2))
+                       drm_warn(display->drm,
+                                "Timeout waiting for PHY %c AUX channel power to be up\n",
+                                phy_name(phy));
+       } else {
+               usleep_range(600, 1200);
+       }
 }
 
 static void xelpdp_aux_power_well_disable(struct intel_display *display,
                                          struct i915_power_well *power_well)
 {
        enum aux_ch aux_ch = i915_power_well_instance(power_well)->xelpdp.aux_ch;
+       enum phy phy = icl_aux_pw_to_phy(display, power_well);
 
        intel_de_rmw(display, XELPDP_DP_AUX_CH_CTL(display, aux_ch),
                     XELPDP_DP_AUX_CH_CTL_POWER_REQUEST,
                     0);
-       usleep_range(10, 30);
+
+       if (DISPLAY_VER(display) >= 35) {
+               if (intel_de_wait_for_clear(display, XELPDP_DP_AUX_CH_CTL(display, aux_ch),
+                                           XELPDP_DP_AUX_CH_CTL_POWER_STATUS, 1))
+                       drm_warn(display->drm,
+                                "Timeout waiting for PHY %c AUX channel to powerdown\n",
+                                phy_name(phy));
+       } else {
+               usleep_range(10, 30);
+       }
 }
 
 static bool xelpdp_aux_power_well_enabled(struct intel_display *display,