RISC-V: Don't try to vectorize tree-ssa/gen-vect-34.c

We don't yet support vectorization on RISC-V.

gcc/testsuite/ChangeLog

	* gcc.dg/tree-ssa/gen-vect-34.c: Skip RISC-V targets.

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c
index 8d2d36401fe8a0257ec1c3154dc8110dd91b7ba0..41877e05efde324561dfcd935175ecb98a7ae6c0 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c
@@ -13,4 +13,4 @@ float summul(int n, float *arg1, float *arg2)
     return res1;                                       
 }
 
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! { avr-*-* pru-*-* } } } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! { avr-*-* pru-*-* riscv*-*-* } } } } } */