clk: mediatek: rename CLK_DOMAIN_SCPSYS

Rename CLK_DOMAIN_SCPSYS to CLK_MUX_DOMAIN_SCPSYS to make it more clear
that this flag only applies to MUX clocks and not other clock types.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260306-clk-mtk-remove-clk-bypass-xtal-flag-v2-2-b253b49f17b2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>

diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c
index 108c0dcd14ecff48b652547c345e85cffd931d85..77f3a9fc3d3f433cb5101ee1710246e5f22c38ae 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -362,7 +362,7 @@ static const struct mtk_composite top_muxes[] = {
        /* CLK_CFG_5 */
        MUX_GATE(CLK_TOP_ATB_SEL, atb_parents, 0x90, 0, 2, 7),
        MUX_GATE_FLAGS(CLK_TOP_HIF_SEL, eth_parents, 0x90, 8, 3, 15,
-                      CLK_DOMAIN_SCPSYS),
+                      CLK_MUX_DOMAIN_SCPSYS),
        MUX_GATE(CLK_TOP_AUDIO_SEL, audio_parents, 0x90, 16, 2, 23),
        MUX_GATE(CLK_TOP_U2_SEL, usb20_parents, 0x90, 24, 2, 31),
 

diff --git a/drivers/clk/mediatek/clk-mt7623.c b/drivers/clk/mediatek/clk-mt7623.c
index 70570644ca44b09f3616e39f5d6b51ac025232e0..d62b9651fa667b095b5e72f40f40aee50f4cfd00 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7623.c
+++ b/drivers/clk/mediatek/clk-mt7623.c
@@ -701,12 +701,12 @@ static const struct mtk_composite top_muxes[] = {
        MUX_GATE(CLK_TOP_MEM_SEL, mem_parents, 0x40, 8, 1, 15),
        MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, ddrphycfg_parents, 0x40, 16, 1, 23),
        MUX_GATE_FLAGS(CLK_TOP_MM_SEL, mm_parents, 0x40, 24, 3, 31,
-                      CLK_DOMAIN_SCPSYS),
+                      CLK_MUX_DOMAIN_SCPSYS),
 
        MUX_GATE(CLK_TOP_PWM_SEL, pwm_parents, 0x50, 0, 2, 7),
        MUX_GATE(CLK_TOP_VDEC_SEL, vdec_parents, 0x50, 8, 4, 15),
        MUX_GATE_FLAGS(CLK_TOP_MFG_SEL, mfg_parents, 0x50, 16, 3, 23,
-                      CLK_DOMAIN_SCPSYS),
+                      CLK_MUX_DOMAIN_SCPSYS),
        MUX_GATE(CLK_TOP_CAMTG_SEL, camtg_parents, 0x50, 24, 3, 31),
 
        MUX_GATE(CLK_TOP_UART_SEL, uart_parents, 0x60, 0, 1, 7),
@@ -745,7 +745,7 @@ static const struct mtk_composite top_muxes[] = {
        MUX_GATE(CLK_TOP_ASM_H_SEL, asm_parents, 0xD0, 0, 2, 7),
        MUX_GATE(CLK_TOP_MS_CARD_SEL, ms_card_parents, 0xD0, 16, 2, 23),
        MUX_GATE_FLAGS(CLK_TOP_ETHIF_SEL, ethif_parents, 0xD0, 24, 3, 31,
-                      CLK_DOMAIN_SCPSYS),
+                      CLK_MUX_DOMAIN_SCPSYS),
 
        MUX_GATE(CLK_TOP_HDMIRX26_24_SEL, hdmirx_parents, 0xE0, 0, 1, 7),
        MUX_GATE(CLK_TOP_MSDC30_3_SEL, msdc30_parents, 0xE0, 8, 3, 15),

diff --git a/drivers/clk/mediatek/clk-mt7629.c b/drivers/clk/mediatek/clk-mt7629.c
index 7fe62bdcea587e238eff4ace3b85eaaa3856f4f0..85011f5327b81e2c5935f5872ca28365584f0e99 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7629.c
+++ b/drivers/clk/mediatek/clk-mt7629.c
@@ -397,7 +397,7 @@ static const struct mtk_composite top_muxes[] = {
        /* CLK_CFG_5 */
        MUX_GATE(CLK_TOP_ATB_SEL, atb_parents, 0x90, 0, 2, 7),
        MUX_GATE_FLAGS(CLK_TOP_HIF_SEL, hif_parents, 0x90, 8, 3, 15,
-                      CLK_DOMAIN_SCPSYS),
+                      CLK_MUX_DOMAIN_SCPSYS),
        MUX_GATE(CLK_TOP_SATA_SEL, sata_parents, 0x90, 16, 1, 23),
        MUX_GATE(CLK_TOP_U2_SEL, usb20_parents, 0x90, 24, 2, 31),
 

diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index cbe03f23388ecb9365c79e1518b587d5999c641f..e86e677d8ac55fc79c931a5154e69d9d7e76be24 100644 (file)
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -788,7 +788,7 @@ static int mtk_clk_mux_enable(struct clk *clk)
                writel(val, priv->base + mux->gate_reg);
        }
 
-       if (mux->flags & CLK_DOMAIN_SCPSYS) {
+       if (mux->flags & CLK_MUX_DOMAIN_SCPSYS) {
                /* enable scpsys clock off control */
                writel(SCP_ARMCK_OFF_EN, priv->base + CLK_SCP_CFG0);
                writel(SCP_AXICK_DCM_DIS_EN | SCP_AXICK_26M_SEL_EN,

diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
index 806ec2ec20aa0ef583382b96c826a79834e1193c..d33e5cd24807749c2bf04a94a81db33cb781f2ab 100644 (file)
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -22,7 +22,7 @@
 
 #define CLK_PLL_HAVE_RST_BAR           BIT(0)
 
-#define CLK_DOMAIN_SCPSYS              BIT(0)
+#define CLK_MUX_DOMAIN_SCPSYS          BIT(0)
 #define CLK_MUX_SETCLR_UPD             BIT(1)
 
 #define CLK_GATE_SETCLR                        BIT(0)