]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
scsi: ufs: mcq: Fix missing argument 'hba' in MCQ_OPR_OFFSET_n
authorMinwoo Im <minwoo.im@samsung.com>
Sun, 19 May 2024 22:14:56 +0000 (07:14 +0900)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 3 Aug 2024 07:00:07 +0000 (09:00 +0200)
[ Upstream commit 2fc39848952dfb91a9233563cc1444669b8e79c3 ]

The MCQ_OPR_OFFSET_n macro takes 'hba' in the caller context without
receiving 'hba' instance as an argument.  To prevent potential bugs in
future use cases, add an argument 'hba'.

Fixes: 2468da61ea09 ("scsi: ufs: core: mcq: Configure operation and runtime interface")
Cc: Asutosh Das <quic_asutoshd@quicinc.com>
Signed-off-by: Minwoo Im <minwoo.im@samsung.com>
Link: https://lore.kernel.org/r/20240519221457.772346-2-minwoo.im@samsung.com
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/ufs/core/ufs-mcq.c
include/ufs/ufshcd.h

index c532416aec2296599125fbb101e1b89bb5c88bc5..408fef9c6fd66e4d63da0360fca244a189804ac2 100644 (file)
@@ -230,8 +230,6 @@ int ufshcd_mcq_memory_alloc(struct ufs_hba *hba)
 
 /* Operation and runtime registers configuration */
 #define MCQ_CFG_n(r, i)        ((r) + MCQ_QCFG_SIZE * (i))
-#define MCQ_OPR_OFFSET_n(p, i) \
-       (hba->mcq_opr[(p)].offset + hba->mcq_opr[(p)].stride * (i))
 
 static void __iomem *mcq_opr_base(struct ufs_hba *hba,
                                         enum ufshcd_mcq_opr n, int i)
@@ -342,10 +340,10 @@ void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba)
                ufsmcq_writelx(hba, upper_32_bits(hwq->sqe_dma_addr),
                              MCQ_CFG_n(REG_SQUBA, i));
                /* Submission Queue Doorbell Address Offset */
-               ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_SQD, i),
+               ufsmcq_writelx(hba, ufshcd_mcq_opr_offset(hba, OPR_SQD, i),
                              MCQ_CFG_n(REG_SQDAO, i));
                /* Submission Queue Interrupt Status Address Offset */
-               ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_SQIS, i),
+               ufsmcq_writelx(hba, ufshcd_mcq_opr_offset(hba, OPR_SQIS, i),
                              MCQ_CFG_n(REG_SQISAO, i));
 
                /* Completion Queue Lower Base Address */
@@ -355,10 +353,10 @@ void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba)
                ufsmcq_writelx(hba, upper_32_bits(hwq->cqe_dma_addr),
                              MCQ_CFG_n(REG_CQUBA, i));
                /* Completion Queue Doorbell Address Offset */
-               ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_CQD, i),
+               ufsmcq_writelx(hba, ufshcd_mcq_opr_offset(hba, OPR_CQD, i),
                              MCQ_CFG_n(REG_CQDAO, i));
                /* Completion Queue Interrupt Status Address Offset */
-               ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_CQIS, i),
+               ufsmcq_writelx(hba, ufshcd_mcq_opr_offset(hba, OPR_CQIS, i),
                              MCQ_CFG_n(REG_CQISAO, i));
 
                /* Save the base addresses for quicker access */
index bad88bd9199513479d2c321c7e2c5e752d6e0755..d965e4d1277e69d43f8a0b12881ef216b7862d7d 100644 (file)
@@ -1131,6 +1131,12 @@ static inline bool is_mcq_enabled(struct ufs_hba *hba)
        return hba->mcq_enabled;
 }
 
+static inline unsigned int ufshcd_mcq_opr_offset(struct ufs_hba *hba,
+               enum ufshcd_mcq_opr opr, int idx)
+{
+       return hba->mcq_opr[opr].offset + hba->mcq_opr[opr].stride * idx;
+}
+
 #ifdef CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE
 static inline size_t ufshcd_sg_entry_size(const struct ufs_hba *hba)
 {