wifi: ath12k: fix dest ring-buffer corruption when ring is full

commit ed32169be1ccb9b1a295275ba7746dc6bf103e80 upstream.

Add the missing memory barriers to make sure that destination ring
descriptors are read before updating the tail pointer (and passing
ownership to the device) to avoid memory corruption on weakly ordered
architectures like aarch64 when the ring is full.

Tested-on: WCN7850 hw2.0 WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3

Fixes: d889913205cf ("wifi: ath12k: driver for Qualcomm Wi-Fi 7 devices")
Cc: stable@vger.kernel.org      # 6.3
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Baochen Qiang <quic_bqiang@quicinc.com>
Link: https://patch.msgid.link/20250617084402.14475-5-johan+linaro@kernel.org
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/net/wireless/ath/ath12k/hal.c b/drivers/net/wireless/ath/ath12k/hal.c
index a88a9eddd52e05dfd04f8275582cca15db88ed64..cc187f59ff1c48599b12f3fdf6596352518aab40 100644 (file)
--- a/drivers/net/wireless/ath/ath12k/hal.c
+++ b/drivers/net/wireless/ath/ath12k/hal.c
@@ -2134,7 +2134,6 @@ void ath12k_hal_srng_access_end(struct ath12k_base *ab, struct hal_srng *srng)
 {
        lockdep_assert_held(&srng->lock);
 
-       /* TODO: See if we need a write memory barrier here */
        if (srng->flags & HAL_SRNG_FLAGS_LMAC_RING) {
                /* For LMAC rings, ring pointer updates are done through FW and
                 * hence written to a shared memory location that is read by FW
@@ -2149,7 +2148,11 @@ void ath12k_hal_srng_access_end(struct ath12k_base *ab, struct hal_srng *srng)
                        WRITE_ONCE(*srng->u.src_ring.hp_addr, srng->u.src_ring.hp);
                } else {
                        srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr;
-                       *srng->u.dst_ring.tp_addr = srng->u.dst_ring.tp;
+                       /* Make sure descriptor is read before updating the
+                        * tail pointer.
+                        */
+                       dma_mb();
+                       WRITE_ONCE(*srng->u.dst_ring.tp_addr, srng->u.dst_ring.tp);
                }
        } else {
                if (srng->ring_dir == HAL_SRNG_DIR_SRC) {
@@ -2165,6 +2168,10 @@ void ath12k_hal_srng_access_end(struct ath12k_base *ab, struct hal_srng *srng)
                                           srng->u.src_ring.hp);
                } else {
                        srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr;
+                       /* Make sure descriptor is read before updating the
+                        * tail pointer.
+                        */
+                       mb();
                        ath12k_hif_write32(ab,
                                           (unsigned long)srng->u.dst_ring.tp_addr -
                                           (unsigned long)ab->mem,